DesignRules:331 Dangling RAMB16A output: (Help)

[rootz anabo]

Could someone explain why this warning appears when running
place-and-route on my design.

WARNINGesignRules:332 - Blockcheck: Dangling RAMB16A output. Pin
DOPA0 of comp
MDBLOCK/MDFIFO/B345 is not connected.
WARNINGesignRules:332 - Blockcheck: Dangling RAMB16A output. Pin
DOPA1 of comp
MDBLOCK/MDFIFO/B345 is not connected.
WARNINGesignRules:332 - Blockcheck: Dangling RAMB16A output. Pin
DOPA2 of comp
MDBLOCK/MDFIFO/B345 is not connected.

It complains about a xilinx coregen component output port not being
connected. However, I donot find any problem in my verilog code.
Is this something I should be worried about

thanks