DSP simulations

Discussion in 'VHDL' started by Willem Oosthuizen, Jun 25, 2003.

  1. Hi,

    It have coded a block that pops out a value Q of type std_logic_vector(n
    downto 0). This value is a function of N, also of type std_logic_vector(m
    downto 0) The type of function the block calculates is something like Q =
    INT(k x SIN(w x N)+y)

    In my test vectors I would like be able to write something like

    assert (conv_real(Q) - ( k x SIN(w x conv_real(N))+y ) < 3.0)
    report "Failure. Bad result"
    severity failure;

    My Question: Is there functions like conv_real, and SIN ? How do i do it?

    Thanks
    Willem
     
    Willem Oosthuizen, Jun 25, 2003
    #1
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  2. Willem Oosthuizen

    FE Guest

    for simulation purpose only and if it supported by your simulator, you can
    use the IEEE Std 1076.2-1996 library,

    library ieee;
    use ieee.math_real.all;

    function sin is in library ieee.math_real
    function conv_real (std_logic_vector to real) doesn't exist so you must
    write something like real(to_integer(signed(Q))) or
    real(to_integer(unsigned(Q)))

    to see a draft source of ieee.math_real, do a google search on mathpack.vhd

    regards
    FE
     
    FE, Jun 25, 2003
    #2
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