very very unlikely ;-)
the process of extracting code from an FPGA would be a unsupported feature... furthermore FPGA's contain volatile configurations, meaning that your configuration is probably coming from some non-volatile flash memory included on a development board of some kind.
if this were the case, it would be possible to extract the bitstream out of flash and bring into back to the PC - by reprogramming the FPGA to copy the contents of the flash to the RS232 port...
although even once you had a copy of this bitstream you would have to use some pretty advanced software (which i don't think exists) to put it back into VHDL. And even if this software exists: then all your modules would be squashed together, variable and signal names gone along with comments rendering the code all most impossible to read.
to put it in perspective, compiling HDL to bitstream involves some heavy algorithms which make my head spin evening thinking about them, and the process of reversing this (it is effectively decompiling) is humarious...
sorry mate