Memory Initialization Files in Modelsim

[ALuPin]

Dear Sir or Madam,

I want to simulate a VHDL design. It includes RAM structures
with .mif files (memory initialization files in QuartusII).
Modelsim seems not to support that kind of files.
So I use .hex files.
In QuartusII they can be included in the MegaWizard-
PlugInManager.
But how do I involve these .hex files when simulating in Modelsim?
Do they have to be compiled additionally to the
design VHDL files or do they have to be linked to in the testbench?
When trying to simulate after compiling the VHDL modules I get
an error message "Fatal error ... altera_mf.vhd ... not found".

Kind regards
Andres Vazquez
G & D
System Development

 

[Tim Hubberstey]

I want to simulate a VHDL design. It includes RAM structures
with .mif files (memory initialization files in QuartusII).
Modelsim seems not to support that kind of files.
So I use .hex files.
In QuartusII they can be included in the MegaWizard-
PlugInManager.
But how do I involve these .hex files when simulating in Modelsim?
Do they have to be compiled additionally to the
design VHDL files or do they have to be linked to in the testbench?
When trying to simulate after compiling the VHDL modules I get
an error message "Fatal error ... altera_mf.vhd ... not found".

In VHDL, support for memory initialization is not a function of the
simulator, it must be built into the model.

So you have 3 choices:

1. rewrite the memory model to support initialization
2. write a Tcl script to force the contents of an initialization file
into the existing memory model. This might be quite slow, depending on
the size and structure of your memory model.
3. if you have the SE version of Modelsim, write a program in the
language of your choice to initialize the memory using the Foreign
Language Interface. This is not a trivial undertaking but would execute
much faster than 2.

Both 2 and 3 have the disadvantage of being non-portable solutions.

 

[MK]

1. rewrite the memory model to support initialization

2. write a Tcl script to force the contents of an initialization file
into the existing memory model. This might be quite slow, depending on
the size and structure of your memory model.
3. if you have the SE version of Modelsim, write a program in the
language of your choice to initialize the memory using the Foreign
Language Interface. This is not a trivial undertaking but would execute
much faster than 2.

4. Write VHDL function loading the file, parsing and return init value
for memory. Using std.textio and ieee.std_logic_textio (Synopsys package)
routines it should trivial.

p. 4 will be portable.

regards,
MK.

 

[Mika Kontiala]

You need
altera_mf.vhd
altera_mf_93.vhd
altera_mf_components.vhd

In addition, you must not use M-RAM block type, since it doesn't support
memory initialisation. Type "AUTO" should suffice in MegaWizard.
You can select the rom ini-file name in MegaWizard as well.

Just include the .hex file in your simulation directory.

'Hope this helps!

--Mika

 

[Alain]

It works perfectly with the mif file !
simply, verify in the memory model, in the generic map that :
c_mem_init_file is correct : ex: c_mem_init_file => "init.mif",
c_read_mif => 1,
(generic specification for 'C_DIST_MEM_V6_0').

 

[Nitsan vardi]

I want to simulate a VHDL design. It includes RAM structures
with .mif files (memory initialization files in QuartusII).
Modelsim seems not to support that kind of files.
So I use .hex files.
In QuartusII they can be included in the MegaWizard-
PlugInManager.
But how do I involve these .hex files when simulating in Modelsim?
Do they have to be compiled additionally to the
design VHDL files or do they have to be linked to in the testbench?
When trying to simulate after compiling the VHDL modules I get
an error message "Fatal error ... altera_mf.vhd ... not found".

...
MK replied:

4. Write VHDL function loading the file, parsing and return init value
for memory. Using std.textio and ieee.std_logic_textio (Synopsys package)
routines it should trivial.

p. 4 will be portable.

regards,
MK.

Getting the data from a file is trivial, but how can you access the
memory content array without rewriting the memory model?
in my case, I use a memory model for a physical component (ssram)
delivered by the manufacturer, and the actual storage is done in a
variable within a process in the model, so it's scope is limited to
this process. I'd prefer not to alter the supplied model.

regards
Nitsan