minor confusion..

[ma740988]

I'm receiving A/D data comprised of 3 10 bit samples packed in 32 bits.

Word |0 9| 19 | 29 | | 31 |
0 | Sample 0 | Sample 1 | Sample 2 | x | x |

I need an 'unpacker', such that each sample 10 bit will be stored in 16
bits. I'd also like an unpacker that'll store two samples (Sample 0
and Sample 1) in 32 bits. In this case sample 2 will also be stored
in 32 bits. The x's are dont cares.

I've got a solution here where that's comprised of 'ugly' & ad shift
(>>) operations. I'm usure if there's a more suitable approach perhaps
with bitset or ......

Thanks in advance...

 

[Ivan Vecerina]

:
: I'm receiving A/D data comprised of 3 10 bit samples packed in 32 bits.
:
: Word |0 9| 19 | 29 | | 31 |
: 0 | Sample 0 | Sample 1 | Sample 2 | x | x |
:
: I need an 'unpacker', such that each sample 10 bit will be stored in 16
: bits. I'd also like an unpacker that'll store two samples (Sample 0
: and Sample 1) in 32 bits. In this case sample 2 will also be stored
: in 32 bits. The x's are dont cares.
:
: I've got a solution here where that's comprised of 'ugly' & ad shift
: (>>) operations.

Why do you find it ugly?
unsigned sample = (data>>bit_shift_count)&mask;
Ok, VHDL and other languages may support a dedicated bit-extraction
syntax, but I find the above pretty usable and convenient.

: I'm usure if there's a more suitable approach perhaps
: with bitset or ......
No - bitset would only make things more complicated.

One trick to think of if you want to expand the 10 bits sample
to the full range of a 16-bit sample, is that you will want to
do it as follows:
unsigned sample16 = (sample10<<6)|(sample10>>4);
This will ensure that 0000000000 becomes 0000000000000000 and
that 1111111111 becomes 1111111111111111 (not 1111111111000000),
with a linear progression in-between.


Cheers,
Ivan