Here is my code that divides a 32-bit number by a 32-bit number, where both operands are of type UNSIGNED(31 downto 0) and provides a 16-bit fractional number(the divisor is always greater than the dividend). process(CLK) variable count : integer range -1 to 15 := -1; variable tempVal : UNSIGNED(47 downto 0); begin if(RISING_EDGE(CLK) and go = '1') then if(count = -1) then tempVal(47 downto 32) := (others => '0'); tempVal(31 downto 0) := dividend; quotient <= (others => '0'); count := 15; end if; tempVal := SHL(tempVal, CONV_UNSIGNED(1,1)); if(tempVal >= divisor) then quotient(count) <= '1'; tempVal := tempVal - divisor; end if; count := count - 1; end if; end process; When I synthesize this, my maximum clock frequency is 53.110Mhz. Is there a reason why this code runs so slowly? Am I doing something that I shoudln't be doing? Now, I haven't tested this code yet, so if functionally it's wrong, just ignore that, but why is it so slow? Thanks for any help.