Two stage pipelining in 16-bit RISC process

[Anoops]

I want to know about two stage pipelining used in 16-bitRISC process.
Those who are able to give me details of processsors which are working
with the above technology please be kind enough to contact me at
(e-mail address removed)
I have been searching for the above topic for past two days but wasnt
able to find the details of processors.

thank u

Anoop

 

[navneetcertain]

64 bit risc processor

m working on 64 bit risc. can any1 plz help me in pipelining part i have written code in vhdl but nt sure dat is including pipelining or not.m totally confused