Please mention a tool that can accepts VHDL code and converts it into
a circuit schematic(preferably at the register transfer level or gate
level). Does ORCAD have such an option?
Any decent VHDL synthesis tool (Design Compiler from Synopsys,
Leonardo Spectrum or Precision Synthesis from Mentor,
Synplify from Synplicity, etc etc) will do this. Don't expect
it to be free though.
Altera Quartus and Xilinx XST are synthesis tools from the
device vendors that can be obtained free, at least in some
configurations. I'm not sure whether they offer schematic
viewers in the free versions, but they can definitely
create netlist outputs.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services
Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
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