XST Process Failure

Discussion in 'VHDL' started by Jeremy Pyle, Jul 14, 2003.

  1. Jeremy Pyle

    Jeremy Pyle Guest

    I am creating some image processing hardware and one of the things I would
    like to do is to store part of an image as a signal in my architecture. I
    have it declared as:

    type T_IMAGEROWS is array(0 to 4) of UNSIGNED(0 to 511);

    When I instantiate this in my code, the code no longer synthesizes. If I
    try to synthesize the architecture without this in there, it works fine.
    When I put this in I get the following error:

    ERROR:portability:3 - This Xilinx application has run out of memory or has
    encountered a memory conflict. Current memory usage is 1398696 kb. Memory
    problems may require a simple increase in available system memory, or
    possibly a fix to the software or a special workaround. To troubleshoot or
    remedy the problem, first: Try increasing your system's RAM.
    Alternatively, you may try increasing your system's virtual memory or swap
    space. If this does not fix the problem, please try the following: Search
    the Answers Database at support.xilinx.com to locate information on this
    error message. If neither of the above resources produces an available
    solution, please use Web Support to open a case with Xilinx Technical
    Support off of support.xilinx.com. As it is likely that this may be an
    unforeseen problem, please be prepared to submit relevant design files if

    I am using the XiLinx webpack version 5.2 and I have the latest service
    pack. Can I just not instantiate local data this large?


    Jeremy Pyle
    Jeremy Pyle, Jul 14, 2003
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