attribute signal name in procedure

Discussion in 'VHDL' started by imed, Aug 6, 2012.

  1. imed

    imed

    Joined:
    Aug 6, 2012
    Messages:
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    Hi !
    My question was asked before (2005):
    The answer given by @Jonathan Bromley was to try the following:
    The problem is that I tried that and I got:
    # simple_name = s
    # path_name = :name_attrib:p[std_logic]:s
    # instance_name = :name_attrib(a):p[std_logic]:s

    I was expecting # simple_name = SIG.
    What did I miss?

    I used ModelSim Altera Starter edition 6.5
    Thanks.
     
    imed, Aug 6, 2012
    #1
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  2. imed

    imed

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    Aug 6, 2012
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    The aim of all this for me is to write a procedure that checks if a signal value is equal to a given expected value and print a message starting with the name of signal:
    proc_check(signal signal_in, constant value_expected)
    example proc_check(test,'0') ---> test: ok

    any idea?
    should that be possible?
     
    imed, Aug 7, 2012
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  3. imed

    imed

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    imed, Aug 8, 2012
    #3
  4. imed

    imed

    Joined:
    Aug 6, 2012
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    that's why:
    my procedure must have signal name of type string as an additional input :(
    proc_check(test, "test checking", '0') for example :(
     
    imed, Aug 8, 2012
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