Call for Papers: 2005 MAPLD International Conference

Discussion in 'VHDL' started by Richard B. Katz, Mar 8, 2005.

  1. Call for Papers

    2005 MAPLD International Conference

    Ronald Reagan Building and International Trade Center
    Washington, D.C.

    September 7-9, 2005

    The 8th annual MAPLD International Conference will present papers on
    programmable logic devices and technologies, digital engineering, and
    related fields, for military and aerospace applications. Devices,
    technologies, logic design, verification, flight applications, fault
    tolerance, reliability, radiation susceptibility, and encryption
    applications of programmable devices, processors, and adaptive
    computing systems in military and aerospace systems are topics for

    For 2005, MAPLD will be expanded to 3 full days and will feature
    expanded "Birds of a Feather" Workshop Sessions. Full-day seminars
    will be offered on September 6, 2005.

    We are planning an exciting program with presentations by Government,
    industry, academia, and consultants, including talks by distinguished
    Invited Speakers. This conference is open to US and foreign
    participation and is unclassified. For related information, please
    see the NASA Office of Logic Design Web Site (

    Abstract submittal info:
    Abstract deadline: April 25, 2005

    Special Talks Include (developing):

    * Welcome and Opening Address
    Ralph Roe, NASA Engineering and Safety Center
    * Invited Mishap Talk (new for 2005)
    "Computer Overload and The Apollo 11 Lunar Landing"
    Jack Garman (formerly NASA JSC)
    * Panel Session: "Why Are Space Stations So Hard?"
    Roger Launius, National Air and Space Museum
    Keith Cowing, Editor, NASA Watch
    and more ....
    * Invited History Talk
    * The Application Engineers' View

    Four Seminars Are Being Planned:

    * Design Integrity
    * Device Failure Modes and Reliability
    * Reconfigurable High-Performance Computing
    * Real-Time, Hi-Rel Software Issues for Computer Designers

    Planned Technical Sessions

    * Applications: Military & Aerospace
    * Verification of High Reliability Designs
    * Radiation Effects and Mitigation Techniques
    * Logic Design and Processors
    * Reconfigurable Computing, Evolvable Hardware, and Security
    * Poster Session
    * BOF-L: Mitigation Methods for Reprogrammable Logic in the Space
    Radiation Environment
    * BOF-F: Reconfigurable Computing
    * BOF-J: PLD Failures, Analyses, and the Impact on Systems
    * BOF-S: NESC and Software
    * BOF-G: Digital Engineering and Computer Design - A Retrospective
    and Lessons Learned for Today's Engineers
    * BOF-W: Verification of Large Designs and Related Design

    Reservations are being accepts for the Industrial & Gov't Exhibits:

    Early Industrial and Governemnt participants include:

    NASA Office of Logic Design Synthworks
    Space Micro SRC Computers
    BAE Systems: Information and Aldec
    Electronic Warfare Systems
    Actel Corporation ATK Mission Research Corporation
    Aeroflex Colorado Springs Xilinx, Inc.
    Sigrity Mentor Graphics Corporation
    IEEE Aerospace and Electronics NASA Engineering and Safety Center
    Systems Society
    Nallatech Celoxica
    Northrop Grumman Corporation SEAKR Engineering

    For additional information:

    Conference home page:

    Richard B. Katz
    NASA Office of Logic Design
    Richard B. Katz, Mar 8, 2005
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