Does ModelSim or any simulator software have a function similar tothe standard function any logic an

Discussion in 'VHDL' started by Weng Tianxiang, Aug 29, 2009.

  1. Hi,
    The standard function any logic analizer does is to set a trigger
    condition and to set two numbers of sample data before and after the
    trigger condition in order to show the sample waveform window. By
    doing things this way it saves a lot of memory for a logic analyzer,
    because engineers are only interested in the signal wave window around
    the trigger condition around which an error really happens.

    Does ModelSim or any simulator software have the function similar to
    the above standard function any logic analizer has?

    Thank you.

    Weng
     
    Weng Tianxiang, Aug 29, 2009
    #1
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  2. Weng Tianxiang

    KJ Guest

    Re: Does ModelSim or any simulator software have a function similarto the standard function any logic analizer has?


    >
    > Does ModelSim or any simulator software have the function similar to
    > the above standard function any logic analizer has?
    >


    Yes, they're called 'breakpoints'.

    KJ
     
    KJ, Aug 29, 2009
    #2
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  3. Re: Does ModelSim or any simulator software have a function similarto the standard function any logic analizer has?

    On Aug 29, 1:07 pm, Jonathan Bromley <>
    wrote:
    > On Sat, 29 Aug 2009 12:24:17 -0700 (PDT), Weng Tianxiang wrote:
    > >The standard function any logic analizer does is to set a trigger
    > >condition and to set two numbers of sample data  before and after the
    > >trigger condition in order to show the sample waveform window. By
    > >doing things this way it saves a lot of memory for a logic analyzer,
    > >because engineers are only interested in the signal wave window around
    > >the trigger condition around which an error really happens.

    >
    > >Does ModelSim or any simulator software have the function similar to
    > >the above standard function any logic analizer has?

    >
    > Look up the "when" command in ModelSim.  It allows you to set up
    > fairly complex trigger conditions (much more complex than you
    > could do with a logic analyzer).  When the trigger fires, you
    > can execute a Tcl script that will start or stop logging of
    > signals to the waveform dump file.
    >
    > I don't think you will find the "center trigger" feature
    > in a simulator.  The reason for this is that file storage
    > space (for waveform dumps) is cheap; it's logging the data
    > that is expensive.  So there's no special benefit in
    > having a pre-trigger buffer in the way you get in a logic
    > analyzer, where buffering is the limited resource.
    > --
    > Jonathan Bromley, Consultant
    >
    > DOULOS - Developing Design Know-how
    > VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
    >
    > Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
    > ://www.MYCOMPANY.com
    >
    > The contents of this message may contain personal views which
    > are not the views of Doulos Ltd., unless specifically stated.


    Hi Jonathan,
    I have a project continuously running more than 20 days to get an
    error. In my project I have many assert statements to make sure the
    design is going well. If there is an error, the design stops.

    But I couldn't open the waveform window under ModelSim when starting
    the simulation, the reason is very simple: any size of hard disk would
    be filled up within one day simulation.

    I would like the ModelSim or other simulation software to have the
    following function:
    It has two windows to accept two numbers to specify how many clocks
    before and after the point where assert statement fails to generate
    waveform window data.

    For example, 10k, 200. It means the software always keeps latest 10k
    clocks of waveforms and when an assert statement fails, it continue
    running for another 200 clocks and saves 10k+200 clocks of waveforms.

    If ModelSim has the above function, it may be called breakpoint
    function.

    1. Start a project as usual;
    2. Open waveform window and load its *.do file;
    3. Set up Breakpoint window two numbers: number of clocks to record
    waveforms before the break point and number of clocks to record
    waveforms after the break point;
    4. Run ModelSim with waveoform window opened and *.do file loaded;
    5. When you manually stop its running or the running stops because an
    assert statement fails, its shows latest waveforms of specified number
    of clocks.

    It execution in code is very simple:
    1. Run as usual without drawing waveform window;
    2. Generate waveform data into a buffer zone whose size is fixed based
    on the two numbers;
    3. When an assert statement fails, continue run another number of
    clocks; then stop drawing waveform window with all collected data.

    The differences between this method and currrent waveform window
    method are:
    1. The size of waveform data never grow beyond the size of specified
    number of clocks.
    2. When stopped manually or automatically (by failed assert
    statement), it show the latest wavefors of specified number of clocks.

    The above behavior exactly likes the logical analyser break point
    function.

    The method you mention cannot resolve my problem: if you figure out an
    error condition in a when command, then start dumping data, there are
    two situations:
    1. If waveform window is opened and *.do file was loaded, hard disk
    would have been full long before the error condition is met;
    2. If it starts log waveform data, it is too later, because the
    critical error situation has passed.

    If I have any misunderstand, please let me know.

    Thank you.

    Weng
     
    Weng Tianxiang, Aug 30, 2009
    #3
  4. Weng Tianxiang

    HT-Lab Guest

    Re: Does ModelSim or any simulator software have a function similar to the standard function any logic analizer has?

    "Weng Tianxiang" <> wrote in message
    news:...
    On Aug 29, 1:07 pm, Jonathan Bromley <>
    wrote:
    ...
    >Hi Jonathan,
    >I have a project continuously running more than 20 days to get an
    >error.


    20 days in my book sounds totally unworkable, are you using an OEM version of
    Modelsim? In that case you might have hit the OEM limit and Modelsim will simply
    grind to a halt (1% of PE). If you explain what you are trying to do than you
    might get some useful suggestions on how to improve your simulation time.

    >In my project I have many assert statements to make sure the
    >design is going well. If there is an error, the design stops.
    >
    >But I couldn't open the waveform window under ModelSim when starting
    >the simulation, the reason is very simple: any size of hard disk would
    >be filled up within one day simulation.


    You can also turn logging off (-nolog) for say the first 19 days and turn it
    back on again on day 20. You can also use the WLFSizeLimit variable to limit
    the wlf file size (see manual/modelsim.ini).

    >I would like the ModelSim or other simulation software to have the
    >following function:
    >It has two windows to accept two numbers to specify how many clocks
    >before and after the point where assert statement fails to generate
    >waveform window data.


    That is a good option, log an Enhancement Request with Mentor. However, the
    WLFTimeLimit variable might be able to help you (not tried myself)

    ; Limit WLF file by time, as closely as possible,
    ; to the specified amount of simulation time. When the limit is exceeded
    ; the earliest times get truncated from the file.
    WLFTimeLimit = {100 ms}


    Hans
    www.ht-lab.com
     
    HT-Lab, Aug 30, 2009
    #4
  5. Weng Tianxiang

    gabor Guest

    Re: Does ModelSim or any simulator software have a function similarto the standard function any logic analizer has?

    On Aug 30, 3:48 am, "HT-Lab" <> wrote:
    > "Weng Tianxiang" <> wrote in message
    >
    > news:...
    > On Aug 29, 1:07 pm, Jonathan Bromley <>
    > wrote:
    > ..
    >
    > >Hi Jonathan,
    > >I have a project continuously running more than 20 days to get an
    > >error.

    >
    > 20 days in my book sounds totally unworkable, are you using an OEM version of
    > Modelsim? In that case you might have hit the OEM limit and Modelsim will simply
    > grind to a halt (1% of PE). If you explain what you are trying to do than you
    > might get some useful suggestions on how to improve your simulation time.
    >
    > >In my project I have many assert statements to make sure the
    > >design is going well. If there is an error, the design stops.

    >
    > >But I couldn't open the waveform window under ModelSim when starting
    > >the simulation, the reason is very simple: any size of hard disk would
    > >be filled up within one day simulation.

    >
    > You can also turn logging off (-nolog) for say the first 19 days and turn it
    > back on again on day 20. You can also use the WLFSizeLimit  variable to limit
    > the wlf file size (see manual/modelsim.ini).
    >


    The problem with that is that it's not obvious that the wlf will
    contain the most recent portion of the trace. More likely it
    contains from the time it was started until it got full. What
    you need, and what the logic analyzer has, is a ring buffer that
    has a fixed size (up to your disk space limit) and starts
    overwriting the oldest data when it hits that size. I don't
    think ModelSim has that now. It would seem simple enough
    to add, though. The waveform viewer already deals with
    lacking portions of the log, for example when you add signals
    during the simulation run, you'll see "no data" until the
    simulation time that the signal was added.

    > >I would like the ModelSim or other simulation software to have the
    > >following function:
    > >It has two windows to accept two numbers to specify how many clocks
    > >before and after the point where assert statement fails to generate
    > >waveform window data.

    >
    > That is a good option, log an Enhancement Request with Mentor. However, the
    > WLFTimeLimit variable might be able to help you (not tried myself)
    >
    > ; Limit WLF file by time, as closely as possible,
    > ; to the specified amount of simulation time. When the limit is exceeded
    > ; the earliest times get truncated from the file.
    > WLFTimeLimit = {100 ms}
    >
    > Hanswww.ht-lab.com
     
    gabor, Aug 30, 2009
    #5
  6. Re: Does ModelSim or any simulator software have a function similarto the standard function any logic analizer has?

    On Aug 30, 12:48 am, "HT-Lab" <> wrote:
    > "Weng Tianxiang" <> wrote in message
    >
    > news:...
    > On Aug 29, 1:07 pm, Jonathan Bromley <>
    > wrote:
    > ..
    >
    > >Hi Jonathan,
    > >I have a project continuously running more than 20 days to get an
    > >error.

    >
    > 20 days in my book sounds totally unworkable, are you using an OEM version of
    > Modelsim? In that case you might have hit the OEM limit and Modelsim will simply
    > grind to a halt (1% of PE). If you explain what you are trying to do than you
    > might get some useful suggestions on how to improve your simulation time.
    >
    > >In my project I have many assert statements to make sure the
    > >design is going well. If there is an error, the design stops.

    >
    > >But I couldn't open the waveform window under ModelSim when starting
    > >the simulation, the reason is very simple: any size of hard disk would
    > >be filled up within one day simulation.

    >
    > You can also turn logging off (-nolog) for say the first 19 days and turn it
    > back on again on day 20. You can also use the WLFSizeLimit  variable to limit
    > the wlf file size (see manual/modelsim.ini).
    >
    > >I would like the ModelSim or other simulation software to have the
    > >following function:
    > >It has two windows to accept two numbers to specify how many clocks
    > >before and after the point where assert statement fails to generate
    > >waveform window data.

    >
    > That is a good option, log an Enhancement Request with Mentor. However, the
    > WLFTimeLimit variable might be able to help you (not tried myself)
    >
    > ; Limit WLF file by time, as closely as possible,
    > ; to the specified amount of simulation time. When the limit is exceeded
    > ; the earliest times get truncated from the file.
    > WLFTimeLimit = {100 ms}
    >
    > Hanswww.ht-lab.com


    Hi Hans,
    "; Limit WLF file by time, as closely as possible,
    ; to the specified amount of simulation time. When the limit is
    exceeded
    ; the earliest times get truncated from the file.
    WLFTimeLimit = {100 ms} "

    It seems that is what I want: to limit waveform file limit and it may
    overwrite oldest one and continue writing new one.

    I will try the option. I will tell you back if the option is purposely
    designed for that purpose.

    Thank you.

    Weng
     
    Weng Tianxiang, Aug 30, 2009
    #6
  7. Weng Tianxiang

    Guest

    Re: Does ModelSim or any simulator software have a function similarto the standard function any logic analizer has?

    On 30 Aug, 01:41, Weng Tianxiang <> wrote:
    > I have a project continuously running more than 20 days to get an
    > error. In my project I have many assert statements to make sure the
    > design is going well. If there is an error, the design stops.
    >
    > But I couldn't open the waveform window under ModelSim when starting
    > the simulation, the reason is very simple: any size of hard disk would
    > be filled up within one day simulation.


    I've been in almost the same situation and I have also managed to
    crash
    our fileserver by creating a logfile that was too large... :)

    My solution was to use checkpoints in modelsim.

    1. Compile all source code files with +acc so that it is possible to
    add
    signals to the wave window.
    2. Run simulation for 1 hour or until an error occurs.
    3. If no error occured, save a checkpoint with a unique serial number,
    go back to step 2
    4. At this point you can load up the latest checkpoint, add all
    relevant signals to your wave
    window (or signal log if you like the log-command) and rerun the
    simulation

    The advantage of this approach is that you don't have to spend any
    computation
    time to log signal changes while retaining the ability to have full
    visibility
    when you are actually close to an error.


    Look for the checkpoint command in the Modelsim documentation for more
    info.

    /Andreas
     
    , Sep 11, 2009
    #7
  8. Re: Does ModelSim or any simulator software have a function similar to the standard function any logic analizer has?

    wrote:


    > 1. Compile all source code files with +acc so that it is possible to
    > add signals to the wave window.
    > 2. Run simulation for 1 hour or until an error occurs.
    > 3. If no error occured, save a checkpoint with a unique serial number,
    > go back to step 2
    > 4. At this point you can load up the latest checkpoint, add all
    > relevant signals to your wave window (or signal log if you like the
    > log-command) and rerun the simulation
    >
    > The advantage of this approach is that you don't have to spend any
    > computation
    > time to log signal changes while retaining the ability to have full
    > visibility
    > when you are actually close to an error.
    >
    >
    > Look for the checkpoint command in the Modelsim documentation for more
    > info.


    A simple do-script to run the simulation while a signal ("simulate" in my
    case) is true, creating numbered checkpoints every 5 ms:

    # Quit simulation after assertion failure (avoids endless loop of just
    # writing checkpoints).
    #
    onbreak {quit -f}

    # Run the simulation as long as the simulate signal is set
    #
    set n 0
    while {[examine /tc/tb/simulate]} {
    incr n
    run 5 ms
    checkpoint chkpnt_$n
    }

    If an error occurs, load the checkpoint that was created before the error,
    enable tracing and continue simulation.

    But please do test if a generated checkpoint can be loaded and the
    simulation can continue from that checkpoint.

    My experience is that either loading or continuing simulation does not work
    on a unsupported platform like Fedora Core 6 or 8. On a platform that is
    supported (like Redhat entreprise) it does work.

    All I'm saying is: test if it works on your system before simulating for
    days.

    --
    Paul Uiterlinden
    www.aimvalley.nl
    e-mail addres: remove the not.
     
    Paul Uiterlinden, Sep 11, 2009
    #8
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