Bartc wrote:
) There's probably a misunderstanding. A typical asm listing of x=x++ might
) be:
)
) (1) mov R,[x]
) (2) inc [x]
) (3) mov [x],R
Another typical asm listing of x=x++ might be:
(1) mov [x],[x]
(2) inc [x]
And yet another, on a CPU with special post-increment instructions:
(1) mov R,[x]
(2) mpi R,R (move, post-increment)
(3) mov [x],R
In this case, the mpi instruction does the move and the increment
*at the same time*!! This is roughly how it works:
mpi T,S
- The S register output is connected to the T register input
- The S register output is connected to the 1-adder input
- The 1-adder output is connected to the S register input
(A 1-adder immediately puts its input +1 on its output)
- A clock tick is fired, causing each register to take the value of its
input.
Seems perfectly reasonable, yes ?
Of course, the CPU builders didn't add any special checks that the mpi
instruction is not used with the same register as input and output.
That would need extra circuitry, and therefore extra cost.
(Besides, if it were there, then x=x++ would become a trap instruction.)
Now, let's see what happens in the case of " mpi R,R ":
At the clock tick, the input of R has *two* outputs connected to it.
Now, as it happens, the circuitry is such that if two ones or two zeroes
are both connected to an input, then it becomes one or zero respectively,
but if a one and a zero are connected, then the zero wins out(*).
(Of course, this works for each bit separately)
So, basically, you get a bitwise-and of the two outputs.
This means that if you do x=x++, then the result is the bitwise-and
of x and x+1. For example, if x==5, then after x=x++ you have x=4.
And consider yourself lucky, it could also be such that the bits
fluctuate and are semi-random, depending on external factors.
*) I think this is what happens if you have pull-to-ground logic or
whatever it's called.
And yes, CPUs that connects multiple outputs to a register input
simultaneously happens to exist. The 6510 for example.
) Line (1) is the fetching of the value of x in x++
) Line (2) is the incrementing of the contents of x in x++
) Line (3) is the storing of the value fetched in line (1), into x
)
) Clearly there's nothing between Line (1) and (2).
)
) It's possible that some crazy compiler might reverse the order of lines (2)
) and (3) for some reasons best known to itself, but it seems obvious to me
) that the right-hand-side of an assignment should be evaluated before storing
) it in the left-hand-side, which in this case requires no calculation.
Could you explain why this seems obvious to you ? Obviously it does not
seem so for most people.
SaSW, Willem
--
Disclaimer: I am in no way responsible for any of the statements
made in the above text. For all I know I might be
drugged or something..
No I'm not paranoid. You all think I'm paranoid, don't you !
#EOT