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I'm trying to make a JK flip-flop in VHDL, and I'm trying to make the 'hold' state sequence.
So inside my process I have a statement that roughly says
if j = '1' and k = '1'
then q <= not q
I'm getting a compiler error statement saying "Can not read output q".
I can sort of understand this... it can't assign a value to q at first because q is not defined immediately. However, I have seen this done before.
Is it legal to do this? Is there a better way?
So inside my process I have a statement that roughly says
if j = '1' and k = '1'
then q <= not q
I'm getting a compiler error statement saying "Can not read output q".
I can sort of understand this... it can't assign a value to q at first because q is not defined immediately. However, I have seen this done before.
Is it legal to do this? Is there a better way?