lut

U

u_stadler

hi

i'm new to vhdl and right now i'm trying to implement a 8x8 lookup
table.
so far i wasn't too successful. could anyone give me some hints or code
samples how to do this the right way? or recommned some books?

thanks
urban
 
C

charles.elias

The code below implements a generic lookup table using a constant
array of std_logic_vector as the table. You should be able to
to meet your need.


-==========================================================
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.numeric_std.all;
-==========================================================
ENTITY look_up IS
GENERIC(addr_width : positive := 3;
tout_width : positive := 8 );
PORT(addr : in std_logic_vector(addr_width - 1 downto 0);
tout : out std_logic_vector( out_width - 1 downto 0)
);
END look_up;

ARCHITECTURE archlook_up OF look_up IS


subtype table_rng is natural range 0 to 2**addr_width - 1;
type ttable is array( table_rng )
of std_logic_vector( tout_width - 1 downto 0 );

constant table : ttable := ( "10000000", --0
"01000000", --1
"00100000", --2
"00010000", --3
"00001000", --4
"00000100", --5
"00000010", --6
"00000001", --7
);
BEGIN

tout <= table( to_integer( unsigned( addr ) ) );

END archlook_up;

Hope this helps.

Charles
 

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