Makefile question.

Discussion in 'C++' started by xz, Jan 9, 2008.

  1. xz

    xz Guest

    I am a rookie of C++ and got so confused with the Makefile these days.
    Could anyone be so kind and give a little sample Makefile for the
    following particular example?

    Let's say I have the following files describing 4 classes (A, B, C1,
    C2) and a test program (test.cpp) which runs a test for classes C1 and
    C2.

    A.h
    A.cpp
    B.h
    B.cpp
    C1.h
    C1.cpp
    C2.h
    C2.cpp
    test.cpp

    The inhirentance relation among the 4 classes are as follows:

    class C1: public B
    class C2: public B
    class B: public A

    i.e. C1 and C1 are both dependent on B while B is dependent on A.

    test.cpp depends on C1 and C2 and contains the main() function.

    I am on a linux machine(Ubuntu 7.10) and use g++ 4.1 as the compiler.

    Then how should I write the Makefile? Thanks a lot in advance!
     
    xz, Jan 9, 2008
    #1
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  2. xz wrote:
    > I am a rookie of C++ and got so confused with the Makefile these days.


    Those have really nothing to do with each other. C++ language
    Standard does not define 'Makefile', neither is 'Makefile' C++
    specific.

    > Could anyone be so kind and give a little sample Makefile for the
    > following particular example?
    > [..]
    > I am on a linux machine(Ubuntu 7.10) and use g++ 4.1 as the compiler.
    >
    > Then how should I write the Makefile? Thanks a lot in advance!


    Go to 'gnu.*' or 'comp.os.linux.*' hierarchies.

    V
    --
    Please remove capital 'A's when replying by e-mail
    I do not respond to top-posted replies, please don't ask
     
    Victor Bazarov, Jan 9, 2008
    #2
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  3. xz

    Guest

    This might work (or might not). Makefiles are fiddly.

    Where you see <tab> in the following lines, please
    remove the characters "<tab>" and insert the actual
    tab key from the keyboard. Makefiles use the tab key
    for executable lines.

    #%<----------------------------------
    SRC= test.cpp C1.cpp C2.cpp B.cpp A.cpp
    OBJ= $(SRC:.cpp=.o)
    EXE= test
    CC= g++
    %.o: %.cpp
    <tab>$(CC) -o $@ -c $<
    ..PHONY: all
    all: $(EXE)
    $(EXE): $(OBJ)
    <tab>$CC $(OBJ) -o $(EXE)


    xz wrote:
    > I am a rookie of C++ and got so confused with the Makefile these days.
    > Could anyone be so kind and give a little sample Makefile for the
    > following particular example?
    >
    > Let's say I have the following files describing 4 classes (A, B, C1,
    > C2) and a test program (test.cpp) which runs a test for classes C1 and
    > C2.
    >
    > A.h
    > A.cpp
    > B.h
    > B.cpp
    > C1.h
    > C1.cpp
    > C2.h
    > C2.cpp
    > test.cpp
    >
    > The inhirentance relation among the 4 classes are as follows:
    >
    > class C1: public B
    > class C2: public B
    > class B: public A
    >
    > i.e. C1 and C1 are both dependent on B while B is dependent on A.
    >
    > test.cpp depends on C1 and C2 and contains the main() function.
    >
    > I am on a linux machine(Ubuntu 7.10) and use g++ 4.1 as the compiler.
    >
    > Then how should I write the Makefile? Thanks a lot in advance!
     
    , Jan 10, 2008
    #3
  4. xz

    Guest

    x-no-archive: yes
    This might work (or might not). Makefiles are fiddly.

    Where you see <tab> in the following lines, please
    remove the characters "<tab>" and insert the actual
    tab key from the keyboard. Makefiles use the tab key
    for executable lines.

    #%<----------------------------------
    SRC= test.cpp C1.cpp C2.cpp B.cpp A.cpp
    OBJ= $(SRC:.cpp=.o)
    EXE= test
    CC= g++
    %.o: %.cpp
    <tab>$(CC) -o $@ -c $<
    ..PHONY: all
    all: $(EXE)
    $(EXE): $(OBJ)
    <tab>$CC $(OBJ) -o $(EXE)


    xz wrote:
    > I am a rookie of C++ and got so confused with the Makefile these days.
    > Could anyone be so kind and give a little sample Makefile for the
    > following particular example?
    >
    > Let's say I have the following files describing 4 classes (A, B, C1,
    > C2) and a test program (test.cpp) which runs a test for classes C1 and
    > C2.
    >
    > A.h
    > A.cpp
    > B.h
    > B.cpp
    > C1.h
    > C1.cpp
    > C2.h
    > C2.cpp
    > test.cpp
    >
    > The inhirentance relation among the 4 classes are as follows:
    >
    > class C1: public B
    > class C2: public B
    > class B: public A
    >
    > i.e. C1 and C1 are both dependent on B while B is dependent on A.
    >
    > test.cpp depends on C1 and C2 and contains the main() function.
    >
    > I am on a linux machine(Ubuntu 7.10) and use g++ 4.1 as the compiler.
    >
    > Then how should I write the Makefile? Thanks a lot in advance!
     
    , Jan 10, 2008
    #4
  5. xz

    James Kanze Guest

    On Jan 10, 12:50 am, "Victor Bazarov" <> wrote:
    > xz wrote:
    > > I am a rookie of C++ and got so confused with the Makefile these days.


    > Those have really nothing to do with each other. C++ language
    > Standard does not define 'Makefile', neither is 'Makefile' C++
    > specific.


    > > Could anyone be so kind and give a little sample Makefile for the
    > > following particular example?
    > > [..]
    > > I am on a linux machine(Ubuntu 7.10) and use g++ 4.1 as the compiler.


    > > Then how should I write the Makefile? Thanks a lot in advance!


    > Go to 'gnu.*' or 'comp.os.linux.*' hierarchies.


    Linux make is GNU make, and I believe that there's a special
    mailing list for GNU make. Still, my advice would be:

    -- If you're in a professional environment, use their standard
    build tools, and don't worry about it. I've never seen a
    standard environment where programmers had to write more
    than a couple of lines of make, and those generally didn't
    look much like a standard makefile either.

    -- If you're working on your own, trying to learn C++, get an
    IDE, and let it generate the makefiles for you. While the
    IDE's that I've seen are pretty worthless (in fact, they're
    rather counter-productive) for professional programming,
    they're ideal for learning, and they allow you to
    concentrate on one thing at a time: C++, for example, rather
    than makefiles.

    --
    James Kanze (GABI Software) mailto:
    Conseils en informatique orient�e objet/
    Beratung in objektorientierter Datenverarbeitung
    9 place S�mard, 78210 St.-Cyr-l'�cole, France, +33 (0)1 30 23 00 34
     
    James Kanze, Jan 10, 2008
    #5
  6. If you are interested in making 'make' just work, without having to
    know why it works, try this generic Makefile which I myself usually use
    for everything:


    # List source files (not headers!) and binary name:
    # Use:
    #SOURCES=file1.cc file2.cc file3.cc
    # or:
    SOURCES=$(wildcard *.cc)

    BINARY=programname

    # Set up compiler and compiler options:
    CXX=g++
    CXXFLAGS=-Wall -W -ansi -O3
    LDLIBS=

    # If you are compiling a C program (instead of C++), comment out
    # this line:
    LINK.o=$(LINK.cpp)


    # --- No need to modify anything below this line ---
    $(BINARY): $(SOURCES:.cc=.o)

    ..dep:
    g++ -MM $(SOURCES) > .dep

    -include .dep
     
    Juha Nieminen, Jan 10, 2008
    #6
  7. Juha Nieminen wrote:
    > # List source files (not headers!) and binary name:
    > # Use:
    > #SOURCES=file1.cc file2.cc file3.cc
    > # or:
    > SOURCES=$(wildcard *.cc)
    >
    > BINARY=programname
    >
    > # Set up compiler and compiler options:
    > CXX=g++
    > CXXFLAGS=-Wall -W -ansi -O3
    > LDLIBS=
    >
    > # If you are compiling a C program (instead of C++), comment out
    > # this line:
    > LINK.o=$(LINK.cpp)
    >
    >
    > # --- No need to modify anything below this line ---
    > $(BINARY): $(SOURCES:.cc=.o)
    >
    > .dep:
    > g++ -MM $(SOURCES) > .dep
    >
    > -include .dep


    Forgot to tell: It can't know if your #include lines change in your
    source files, so if you change them you'll have to "rm .dep" before
    executing "make" so that it can update the dependencies.
     
    Juha Nieminen, Jan 11, 2008
    #7
  8. xz

    xz Guest

    I understand the most simple (but kinda silly) way to write a Makefile
    is to simply put all related the cpp files after the colon and compile
    them all, like this:

    testprogram: A.cpp B.cpp C1.cpp C2.cpp test.cpp
    <Tab>g++ $? -o $@

    However, the wierd thing that I came across was:
    Every time I run "make testprogram" for the first time, the compiler (g
    ++) complaines that it cannot find the definitions of some member
    functions, which I have defined in A.cpp or B.cpp

    (Of course I hvae included C1.h and C2.h in test.cpp, included B.h in
    C1.h, and included A.h in B.h.)

    And, if I run "make testprogram" again (for the second time), then
    they all compile well and the executable is just made there in good
    state.

    Anybody knows why that is happening?
    I am using emacs and the running the compile command "make
    testprogram" within emacs, I am not sure if that matters.
     
    xz, Jan 14, 2008
    #8
  9. xz wrote:
    > I understand the most simple (but kinda silly) way to write a Makefile
    > is to [.. problems using 'g++' and 'make' ..]
    >
    > Anybody knows why that is happening?
    > I am using emacs and the running the compile command "make
    > testprogram" within emacs, I am not sure if that matters.



    Somebody knows. But this is the wrong newsgroup to ask about it.
    Please try 'gnu.*' hierarchy or the newsgroup for your platform.
    'make' or 'emacs' are not part of C++ _language_ and as such are
    off-topic here. 'g++' has its own newsgroup.

    V
    --
    Please remove capital 'A's when replying by e-mail
    I do not respond to top-posted replies, please don't ask
     
    Victor Bazarov, Jan 14, 2008
    #9
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