B
Boris Boutillier
Hi all,
I'm looking for parsing a Verilog file in my python module,
is there already such a tool in python (a module in progress) to
help instead of doing a duplicate job.
And do you know of some generic parsing module in python, in which you
give some kind of grammar and callbacks ?
Thanks for the help
Boris
I'm looking for parsing a Verilog file in my python module,
is there already such a tool in python (a module in progress) to
help instead of doing a duplicate job.
And do you know of some generic parsing module in python, in which you
give some kind of grammar and callbacks ?
Thanks for the help
Boris