F
Fred
Hi
I'm looking for way to verify an ata/atapi-6 design. I could write
one myself, but that would probably take a year or two, and that's not
woth the effort.
I need it to verify both functionality and timing of a device that
shall be plugged onto the IDE bus, between the host and the device.
So far I have found a solution from Yogitech (www.yogitech.com)
that more or less does what I want, but only for ATA/ATAPI-4.
I've searched the net, but haven't found much in addition to Yogitech.
Do any of you know of anything that could be of interest, please emali
me at frode at HOTEL DELTA DELTA dot NOVEMBER OMEGA, or
post your reply here. NB: Since I'm crossposting this accross many
groups, and haven't got a "reply-to" field, I'd of course be happy if
the replies got to me per email ;-)
-Frode, Norway.
I'm looking for way to verify an ata/atapi-6 design. I could write
one myself, but that would probably take a year or two, and that's not
woth the effort.
I need it to verify both functionality and timing of a device that
shall be plugged onto the IDE bus, between the host and the device.
So far I have found a solution from Yogitech (www.yogitech.com)
that more or less does what I want, but only for ATA/ATAPI-4.
I've searched the net, but haven't found much in addition to Yogitech.
Do any of you know of anything that could be of interest, please emali
me at frode at HOTEL DELTA DELTA dot NOVEMBER OMEGA, or
post your reply here. NB: Since I'm crossposting this accross many
groups, and haven't got a "reply-to" field, I'd of course be happy if
the replies got to me per email ;-)
-Frode, Norway.