Non static border in Loop

[Bochumfrau]

Hi @ all,

I want to define a loop border
which is not static.


example:

....

for i in l_border downto 0 loop
...
end loop;


The signal l_border could be an integer signal whose value is
calculated before.

The problem is when I try to compile it (Altera QuartusII)
I get the error message that the border must be a constant.
Also tried it with a while-loop but then I get the error message
that no signals can be uses in the loop environment.

Does somebody know how to solve this problem?

Thank you for your help.

Regards )
Eva

 

[Kumaran Selvaratnam]

Hi,

I believe VHDL uses for loop only for applying the same operation over a
predetermined range. This means if you are able to do it for a variable
number of times you could basically change the hardware implemented
depending on the particular border signal. This is not possible as
hardware cannot appear and disappear as the operation of the hardware
happens.

If you want to do something like that, say you want to have various
border values then why not use generics instead?
If you can explain what you are trying to do within the loop it may be
able to explain why VHDL(Quartus) restricts such a usage!!

Kumaran

 

[Kai Harrekilde-Petersen]

(e-mail address removed) wrote:

I believe VHDL uses for loop only for applying the same operation over a
predetermined range. This means if you are able to do it for a variable
number of times you could basically change the hardware implemented
depending on the particular border signal. This is not possible as
hardware cannot appear and disappear as the operation of the hardware
happens.

Not exactly. A variable shift could be implemented with a
barrelshifter. The point here is that the hardware will have to
support *all* of the operations.

I believe that the restriction is merely related to the actual
synthesis tool.

It may be possible to rewrite the loop into something like this:

for i in 0 to 32 loop
if i = l_border then
...
exit;
end if
end loop

The exit statement is important, as it tells the synthesis tool that
it can only execute the statements inside the if once, and it can do
valuable optimizations based on that.

Regards,


Kai

 

[Eyck Jentzsch]

Hi @ all,

I want to define a loop border
which is not static.


example:

...

for i in l_border downto 0 loop
...
end loop;


The signal l_border could be an integer signal whose value is
calculated before.

The problem is when I try to compile it (Altera QuartusII)
I get the error message that the border must be a constant.
Also tried it with a while-loop but then I get the error message
that no signals can be uses in the loop environment.

Does somebody know how to solve this problem?

Thank you for your help.

Regards )
Eva

For synthesis you need fixed bounds of a loop, otherwise the synthesizer
cannot generate logic for the unrolled loop (if you think HW each loop
invocation is one piece of logic). Consider using break or enables:
for i in 0 to l_border_max loop
...
if i > l_border then
break;
end if;
end loop;

or:
for i in l_border downto 0 loop
if i > l_border then
continue;
end if;
...
end loop;

or:
for i in l_border downto 0 loop
if i <= l_border then
...
end if;
end loop;

HTH

-Eyck