open bank policy optimization

[alexquisi]

Hi,

I am newbie in optimization techniques and I need a little of help.

I want to take adventage of the open bank and open row policy
available in the processor (it can keep 4 banks open per bank, for a
total of 12 banks at a time) that I am using (AU1xxx), by locating
code, data, etc. on separete SDRAM bank and row boundaries.

The processor's documentation says that it can be done using the
linker, to indicate aligment of the various sections.

I am using MS compiler (but in general this apply for any compiler),
which allows to do that with:

#pragma comment(linker, "/SECTION:name, ALIGN=#")

My problem is, I do no understand how all this fit together. For
example, how can I use this technique to align disk buffers or program
code on an SDRAM bank boundary (i.e. 128 MB SDRAM with 32 MB bank size
and 4 KB row size)?

Thanks a lot for your help.

Alex

 

[Jacek Dziedzic]

Hi,

I am newbie in optimization techniques and I need a little of help.

I want to take adventage of the open bank and open row policy
available in the processor (it can keep 4 banks open per bank, for a
total of 12 banks at a time) that I am using (AU1xxx), by locating
code, data, etc. on separete SDRAM bank and row boundaries.

[snip]

Wrong newsgroup, unfortunately.

http://www.parashift.com/c++-faq-lite/how-to-post.html#faq-5.9

HTH,
- J.

 

[=?iso-8859-1?q?Erik_Wikstr=F6m?=]

Hi,

I am newbie in optimization techniques and I need a little of help.

I want to take adventage of the open bank and open row policy
available in the processor (it can keep 4 banks open per bank, for a
total of 12 banks at a time) that I am using (AU1xxx), by locating
code, data, etc. on separete SDRAM bank and row boundaries.

The processor's documentation says that it can be done using the
linker, to indicate aligment of the various sections.

I am using MS compiler (but in general this apply for any compiler),
which allows to do that with:

#pragma comment(linker, "/SECTION:name, ALIGN=#")

My problem is, I do no understand how all this fit together. For
example, how can I use this technique to align disk buffers or program
code on an SDRAM bank boundary (i.e. 128 MB SDRAM with 32 MB bank size
and 4 KB row size)?

Are you sure that you will benefit from this kind of optimisation,
have you profiled your code and performed all other kinds of
optimisations that can be done?

A second comment, does this really work on a modern platform with
virtual memory (or are you programming against an embedded
platform,?). Since it's up to the OS to map the virtual memory
addresses into real, physical, addresses I can't see how the compiler
or linker can make any changes when it comes to physical placement.

 

[alexquisi]

Hi Eric,

well, I am actually trying to use this technique in an embedded
device, but it uses VM (WinCE).

Not sure how good would be the improvement, it is what I want to see.
The documentation says that it can improve the SDRAM throughput due to
locality of references (i.e. having instructions and data residing in
different banks, which improve access time to these items).

Thanks and sorry if it is a little offtopic here, but it was the NW
where I found more topics about optimizations.

Regards,

Alex