partioning made easy?

[gzidude]

Is it possible to partition a section of hardware within VHDL, at the code level? Not necessarily as part of the VHDL standard, but maybe as a vendor specific addition. That way the logic implementation is at least grouped or clustered or conveniently sectioned off so I can easily grab just the related logic and place it? It's a huge, very time consuming, pain trying to partition hardware when the gates and flip-flops don't resemble my code at all.