PLEASE HELP!!!!!

[jozo]

I'm a rookie in VHDL and I have a very BIG problem:
I have a project to make Elevator Controler for a building with 5 floors,
but I don't have a clue how to start. I don't know how to draw a state
diagram for the elevator (I think that that would be a good start before
programming). If anyone has any experience with elevators, please help.

Thank you very much for any help (links, suggestions...).
THANK YOU!!!!
THANK YOU!!!!

 

[elizabeth]

I will have the same problem in about a month, so any help is wellcome!!!

thnx

 

[Joe]

I will have the same problem in about a month, so any help is wellcome!!!

thnx

It seems university lecturers finally find another topic for students
rather than traffic lights and vending machines

First of all, think about what are the inputs that will goto your
controller's cicuit board.

To make it simple, ignore the operation of the doors, and just use a
input signal to indicate boarding/un-boarding completed.

Then imagine one morning you woke up and find that you are an elevator,
what will you do? ;-)

Joe

 

[Wing Fong Wong]

It seems university lecturers finally find another topic for students
rather than traffic lights and vending machines

First of all, think about what are the inputs that will goto your
controller's cicuit board.

To make it simple, ignore the operation of the doors, and just use a
input signal to indicate boarding/un-boarding completed.

Then imagine one morning you woke up and find that you are an elevator,
what will you do? ;-)

Joe

I remember doing something like that in first year (5 years ago now). We had
to use UML(a package called Rational Rose IIRC) to properly decsribe the case.

Just a bit off topic but rational rose package did help generate code.

As Joe said you need to consider what are the inputs to your elevator. In
my case we had buttons in the elevator, up down buttons in each floor,
sensors to detect the postion of the lift at a floor and some inter-floor
sensors too.

Then you need to determin what actions your elevator has to perform. I suggest
pick an elevator close to your setup. For me it just so happens that the
models we were using were modeled after the ones at uni. If your lift does
not have a close door button don't look at one that does. Anyhow, just spend
an hour or so riding the elevator up and down and trying all sorts of botton
presses. Bring with you pen and paper( or what ever you choose to write with)
and record what happens and remember to examine everything(aside from the stop
button that is, I press that and I was stuck in the lift for 40 min).

After you've made your observations go back and look at your model, look at
what you can control, eg. speed, direction, doors and maybe even a bell.

Now you can start looking at a state diagram. IIRC I implemented my controller
as a mealy machine. I picked an initial state(state 0) set the elevator to be
stationary, on the ground floor bell is off and the doors are closed. With N
inputs I then had 2^N transition from state 0 initially, but many of them
were redundant. After each set of inputs there is a new state. With it new
state is a whole set of conditions. Anyway, after exhausting all the posible
state and I found myself to be repeating. I started seeing which state could
be combined. Eventually I ended up reducing it from about a couple of hundred
states to a few dozen states. I transfered my pen and paper drawings to UML
and then got it to generate my Java sourcecode. Just FYI, our project was a
little different, our controller was implemented in software.

Well, that was how I handled it in the most vague of terms. Looking back now
I would've probably done it differnently but I didn't know better back then.

 

[Charles M. Elias]

I'm a rookie in VHDL and I have a very BIG problem:
I have a project to make Elevator Controler for a building with 5 floors,
but I don't have a clue how to start. I don't know how to draw a state
diagram for the elevator (I think that that would be a good start before
programming). If anyone has any experience with elevators, please help.

Thank you very much for any help (links, suggestions...).
THANK YOU!!!!
THANK YOU!!!!

A big part of solving a logic problem is thinking about it before you
start doing any implementation. You learn how to do this by doing it
yourself. You do not learn how to do it by having someone else think
for you. How difficult is it to imagine yourself walking up to an
elevator door and pushing an up or down button, waiting for the
elevator to arrive, watching the door open, entering the elevator,
pushing the button to request the floor you wish to go to, watching
the door close, etc? My opinion is that you really didn't give this
problem a lot of thought before pleading for help from this newsgroup.
Personally, I like to help students or fellow engineers when I can,
but I don't have any incentive to help someone whose only effort in
solving a problem is concluding that drawing a state diagram would be
a good start. You have already been given some excellent pointers on
how to get started on your problem. I have another pointer for you.
You need to learn to think analytically by exercising your own mind.
An algebra teacher once told his class that you can't learn to play
the piano by going to recitals; you must practice (work the homework
problems yourself).

Charles

 

[VhdlCohen]

What others have suggested is correct. You basically need a requirements
document. That can be written in a natural language, like English. However, a
technology that has really cought on is the use of executable requirements
using a lnaguage like PSL (Property Specification Language) or SVA (
SystemVerilog Assertion). PSL or SVA provide better readability of the
requirements, and provide verification of thoses properties using either
simulation or formal verification. For example:
-- psl default clock is (clk'event and clk='1');
-- psl property FifoIsFull is
-- always {people_counter=MAX_CAPACITY} |-> {fifo_full_s};
-- psl assert FifoIsFull;

-- psl property CloseOnFifoIsFull is
-- always {fifo_full_s} |-> {elevator_door_s=CLOSED};
-- psl assert CloseOnFifoIsFull;

-- A START/STOP input is also available to the attendant,
-- psl property manual_open is
-- always {manual_cntrl=START} |=> {elevator_door_s = OPENED};
-- psl assert manual_open;

Above properties will show during a review an issue with the design ...
If the elevator people counter shows a maximum capacity of people in the
elevator, then the door is closed. However, what if during that time, the
manual control is in START?
The property CloseOnFifoIsFull needs to be modified to something like:
-- psl property CloseOnFifoIsFull is
-- always {(fifo_full_s and manual_cntrl=Neutral) or
manual_cntrl=STOP} |-> {elevator_door_s=CLOSED};
-- psl assert CloseOnFifoIsFull;

PSL or SVA uses an Assertion-Based Verification methodology. Our latest book
address PSL by example.
Ben Cohen
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* Using PSL/SUGAR for Formal and Dynamic Verification 2nd Edition, 2004 isbn
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* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
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* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
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