Pseudorandom Noise Generator....

Discussion in 'VHDL' started by comp.lang.vhdl, Mar 16, 2009.

  1. I m generating a PN Sequence in which for sake of simplicity i m
    taking three flip flops for 3 bit sequence...and the design is such
    that.....q(1) gets input from q(0)....q(2) gets input from q(1)....and
    q(0) gets input from the xor output of q(1) and q(2)....now the
    problem is that...i want to store the output of q(2) upto 7
    cycles...so that i can get a 7-bit sequence....which is a PN
    Sequence....please help me...i need a VHDL code for this.....
    comp.lang.vhdl, Mar 16, 2009
    #1
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  2. comp.lang.vhdl

    Stef Guest

    In comp.lang.vhdl,
    comp.lang.vhdl <> wrote:
    > I m generating a PN Sequence in which for sake of simplicity i m
    > taking three flip flops for 3 bit sequence...and the design is such
    > that.....q(1) gets input from q(0)....q(2) gets input from q(1)....and
    > q(0) gets input from the xor output of q(1) and q(2)....now the
    > problem is that...i want to store the output of q(2) upto 7
    > cycles...so that i can get a 7-bit sequence....which is a PN
    > Sequence....please help me...i need a VHDL code for this.....


    So you need VHDL code for a 7-bit shift register? Shouldn't be hard to
    find with a search engine. And there seems to be something wrong with
    your keyboard: It generates some extra punctuation at (pseudo?) random
    intervals.

    --
    Stef (remove caps, dashes and .invalid from e-mail address to reply by mail)

    The Moral Majority is neither.
    Stef, Mar 16, 2009
    #2
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  3. comp.lang.vhdl

    JohnDuq

    Joined:
    Dec 9, 2008
    Messages:
    88
    Did you see this thread?

    www dot velocityreviews dot com/forums/t21646-awgn-in-vhdl.html
    JohnDuq, Mar 18, 2009
    #3
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