Q, logic value 'X'

P

Pasacco

hi

During some debugging in my simulation, it is found that one signal is
'X' from the beginning (from time 0) until that signal has some value
(1 or 0).

What does this 'X' (forced unknown) imply?
Is it problematic?
Does it "always" meaning that the value is conflicting (from the
beginning)?

Thankyou in advance
 
M

Mike Treseler

Pasacco said:
What does this 'X' (forced unknown) imply?
Usually a node driven by an
initialized register or ram.
The node is driven, but the value
cannot be determined by the simulator.
Is it problematic?
Not always, but connect up a reset if you can.
It will make your simulation easier.
Does it "always" meaning that the value is conflicting (from the
beginning)?

Most often it's just unknown from the beginning
until the register gets some know data.

-- Mike Treseler
 
A

Aki Hyyryläinen

Pasacco said:
hi

During some debugging in my simulation, it is found that one signal is
'X' from the beginning (from time 0) until that signal has some value
(1 or 0).

What does this 'X' (forced unknown) imply?

Could be that you are driving the signal from several places at the same
time; simulator cannot know which value to use and shows X, or it is an
output from say an uninitialised memory model.
Is it problematic?

If you use it to generate other signals, the X will propagate in all those
signals. If you don't use it until it has a known value, there is no
problem.

Does it "always" meaning that the value is conflicting (from the
beginning)?

The value is simply unknown.

-Aki
 
P

Pasacco

hi

I think it is correct, as you wrote, that uninitialized signal drives
other signal, as the following warning message appears

Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the
result will be 'X'(es).

Thankyou for comment very much
 

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