question about spreading

[lezah]

Hi,
I want to ask how to do spreading in VHDL,
if i have A<=(1,-1,-1,1)
the channelization code is (1,-1,-1,1),
after spread: it should be B<=(1,-1,-1,1,-1,1,1,-1,-1,1,1,-1,1,-1,-1,1),
in VHDL, the time slot for every bit is 100ns,
so how to make A to be B?
or how to spread 1 bit to 4 bit?
thanks

Lezah

 

[valentin tihomirov]

Have you checked this?

SPREAD_A_to_B: for N in 0 to 3 loop
B(N*4 to N*4+3) <= A;
end loop;