Testing generic module

Discussion in 'VHDL' started by hssig, Jan 6, 2010.

  1. hssig

    hssig Guest

    Hi,

    I want to write a testbench to test a module with generic(s).


    The unit under test:

    component gen_mod
    generic( gA : natural := 3)
    port( ....);
    end component;


    Now in my testbench I define an array of constants, for example:

    type type_ctable is array(natural range <>) of natural;

    constant cGenTable : type_ctable(0 to 7) := (3,4,5,6,7,8,9.10);

    The instantiation of the UUT:

    UUT: gen_mod
    generic map( gA => cGenTable(0))
    port map( ...);

    Now my question is how to perform a bundle of simulation runs to test
    the complete array of constants without having to adjust the generic
    map manually, then recompile and restart the simulation.

    Thank you for your opinion.

    Cheers,
    hssig
     
    hssig, Jan 6, 2010
    #1
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  2. On Wed, 6 Jan 2010 06:31:20 -0800 (PST), hssig wrote:

    >I want to write a testbench to test a module with generic(s).
    >
    >Now in my testbench I define an array of constants, for example:
    >
    >type type_ctable is array(natural range <>) of natural;
    >
    >constant cGenTable : type_ctable(0 to 7) := (3,4,5,6,7,8,9.10);
    >
    >The instantiation of the UUT:
    >
    >UUT: gen_mod
    >generic map( gA => cGenTable(0))
    >port map( ...);
    >
    >Now my question is how to perform a bundle of simulation runs to test
    >the complete array of constants without having to adjust the generic
    >map manually, then recompile and restart the simulation.


    Two options spring to mind:

    (1)
    If the scale of the problem is sufficiently small,
    you could instantiate ALL your diffferent UUTs using a
    generate loop:

    gen_various_devices:
    for config in cGenTable'range generate
    UUT: gen_mod generic map (gA => cGenTable(config)) ...;
    end generate;

    and then a single sim will run all of them in parallel. You
    would probably need to instantiate various other parts of your
    testbench in the generate loop too, because presumably the
    various UUT configurations won't all behave in the same way
    and they may even need rather different stimulus.

    (2)
    Better (I think): Set the generic from the simulator command line.
    Given your table-of-constants, you have a single number (an index
    into that table) that controls your entire UUT and testbench
    setup. If you give the top-level testbench a generic of its own,
    to set that index:

    entity tb_top is
    generic (config: natural);
    end;
    architecture A of tb_top is
    ...
    begin
    UUT: gen_mod generic map (gA =>cGenTable(config)) ...;
    ...

    you can then compile the whole mess just once, and simulate
    with any chosen value of the top-level config. This for
    ModelSim - other simulators can do similar things:

    <file run_all_configs.tcl>
    for {set config 0} {$config < 8} {incr config} {
    # load sim with correct generic
    vsim -c -gconfig=$config tb_top
    # run sim
    run -all
    }

    <at the simulator command prompt>
    do run_all_configs.tcl

    If your simulation is large, this approach makes it easy
    to distribute the simulation runs across several machines
    using GridEngine or whatever.

    (3)
    Like (2), but instead of using the simulator command line
    to set the generic, write a VHDL configuration for each
    different generic value you care about. Then you can,
    once again, compile the whole lot; and simply choose which
    VHDL configuration you wish to simulate. Many folk
    find VHDL configurations somewhat indigestible, and I
    strongly sympathize; maybe the simulator command line
    thing is less hassle after all.
    --
    Jonathan Bromley
     
    Jonathan Bromley, Jan 6, 2010
    #2
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  3. hssig

    Andy Guest

    Most simulators will allow command line options that set the value(s)
    of top level generic(s), in this case, the top level testbench entity.
    Just pass the generic you want to use up to the top of your
    testbench, and then a script can invoke simulations for each generic
    value.

    Andy
     
    Andy, Jan 6, 2010
    #3
  4. hssig

    hssig Guest

    >you can then compile the whole mess just once, and simulate
    >with any chosen value of the top-level config.


    Your proposed approach works fine!

    Thank you.
    Cheers,
    hssig
     
    hssig, Jan 12, 2010
    #4
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