Bill said:
Lets set aside the buzz word of the day. Consider reuse as another
facet of improving VHDL design. Frederick Brooks said there is no
silver bullet - no single program/process. Want lots of reuse (and
maybe fewer bugs)? take lots of (mostly) small steps:
1. Write and use a VHDL Coding Standards document
2. Use a linter on the code
3. Use a common directory structure
4. Use a revision control system for the code
5. Run code coverage
6. Use a bug tracking system
7. Set up separate design and verification teams
8. Do code peer review
OK. We know what will happen if you walk into the manager's office
with a big list of things. Pick one - Try peer code reviews. Like
Mike said, "I have to develop a process before I can discuss
optimizing it."
gl
I agree with everything both you and Mike say. But the customer does
require CMMI and we do have a process in place (both HW and SW). We need
such mundane VHDL things as code standards, testing process, control of
product, etc.
For example, one project has only 4 architectures ( Algorithmic,
Dataflow, RTL, and Board) while another has literally hundreds (five or
six for each component "core"). Needles to say our C/C++ development
goes smoothly (HA-HA), but VHDL development keeps "loosing the recipe".
One project spent tens of thousands of dollars in OTP cplds trouble
shooting a timing problem that should have been found way before burning
the first device.
Any reference to VHDL and CMMI or iso9000 would help a lot.