Why isnt buffer used more often?

[Tricky]

Is there any reason more people dont use the buffer port type? is
there anything you cant do with it that you can do with an internal
signal?

Is it just an old thing that old synthesisors wouldnt support it, and
it has fallen out of favour?

 

[scrts]

Is there any reason more people dont use the buffer port type? is
there anything you cant do with it that you can do with an internal
signal?

Probably because it could mess up the design flow understanding.

 

[Brian Drummond]

Probably because it could mess up the design flow understanding.

I don't see how, really.

It could certainly mess up the process of verifying the design, mostly
because synthesis tools would pour out thousands of spurious warnings,
presumably hangovers from a much earlier release that might have got it
wrong. (For the record I never did see an actual problem, at least as far
back as Leonardo/Galileo, but there may have been some)

There were some (to my eyes, apparently unnecessary) rules about
connecting internal Buffer ports to higher level Out ports or vice-versa,
that made it difficult to mix the two styles, so Buffer was not as useful
in practice as it looked.

- Brian

 

[HT-Lab]

Is there any reason more people dont use the buffer port type? is
there anything you cant do with it that you can do with an internal
signal?

Is it just an old thing that old synthesisors wouldnt support it, and
it has fallen out of favour?

With the VHDL2008 capability of reading an output port I guess it will
become obsolete?

Hans
www.ht-lab.com

 

[eliascm]

Buffer Ports

I stopped using buffer ports when I found that the Cypress Galaxy fitter (ancient and buggy, but I did a lot of designs using it) required std_logic and std_logic_vector ports for timing simulation. It takes an extra internal signal to avoid using buffer (this is before the new VHDL), but it was worth it to be able to do a timing simulation.

 

[Andy]

With the VHDL2008 capability of reading an output port I guess it will
become obsolete?

Hanswww.ht-lab.com

Depends on whether reading an output in 2008 version returns the
driven value or the resolved value of the output.

Andy

 

[Mike Treseler]

Buffer ports worked fine last time I tried it.
As I recall, it was sig'driving_value that used to fail silently in synthesis.
I don't use buffer ports now because variables can drive both ports and nodes in process scope.

-- Mike Treseler

 

[JimLewis]

Depends on whether reading an output in 2008 version returns the
driven value or the resolved value of the output.

Driving value:
Ports of mode out have identical semantics to ports of mode buffer.

Jim

 

[Pieter Hulshoff]

Is there any reason more people dont use the buffer port type? is
there anything you cant do with it that you can do with an internal
signal?

Is it just an old thing that old synthesisors wouldnt support it, and
it has fallen out of favour?

Other than on top-level, we use type BUFFER for all our block output ports. We've not had any trouble with that for over 14 years now.

Kind regards,

Pieter Hulshoff

 

[Paul Uiterlinden]

Is there any reason more people dont use the buffer port type? is
there anything you cant do with it that you can do with an internal
signal?

The only reason people started using OUT in stead of BUFFER is because of
its name. I would say if the names were reversed, everybody still would
have used OUT with the bonus of not having to resort to ugly things a
internal signals to be able to read back the value of such a port, let
alone using INOUT for that reason.

In our company BUFFER has always been the standard for outputs. Never had
much trouble with that, except on top level, where foundries insisted on
OUT. But that was easy to fix.

Now with VHDL-2008, things have relaxed a bit more, so you can even mix
BUFFER and OUT.