Why isnt buffer used more often?

Discussion in 'VHDL' started by Tricky, Dec 5, 2011.

  1. Tricky

    Tricky Guest

    Is there any reason more people dont use the buffer port type? is
    there anything you cant do with it that you can do with an internal
    signal?

    Is it just an old thing that old synthesisors wouldnt support it, and
    it has fallen out of favour?
     
    Tricky, Dec 5, 2011
    #1
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  2. Tricky

    scrts Guest

    >"Tricky" <> wrote in message
    >news:...
    > Is there any reason more people dont use the buffer port type? is
    > there anything you cant do with it that you can do with an internal
    > signal?


    Probably because it could mess up the design flow understanding.
     
    scrts, Dec 5, 2011
    #2
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  3. On Mon, 05 Dec 2011 10:54:33 +0200, scrts wrote:

    >>"Tricky" <> wrote in message
    >>news:...
    >> Is there any reason more people dont use the buffer port type? is there
    >> anything you cant do with it that you can do with an internal signal?

    >
    > Probably because it could mess up the design flow understanding.


    I don't see how, really.

    It could certainly mess up the process of verifying the design, mostly
    because synthesis tools would pour out thousands of spurious warnings,
    presumably hangovers from a much earlier release that might have got it
    wrong. (For the record I never did see an actual problem, at least as far
    back as Leonardo/Galileo, but there may have been some)

    There were some (to my eyes, apparently unnecessary) rules about
    connecting internal Buffer ports to higher level Out ports or vice-versa,
    that made it difficult to mix the two styles, so Buffer was not as useful
    in practice as it looked.

    - Brian
     
    Brian Drummond, Dec 5, 2011
    #3
  4. Tricky

    HT-Lab Guest

    On 05/12/2011 08:44, Tricky wrote:
    > Is there any reason more people dont use the buffer port type? is
    > there anything you cant do with it that you can do with an internal
    > signal?
    >
    > Is it just an old thing that old synthesisors wouldnt support it, and
    > it has fallen out of favour?


    With the VHDL2008 capability of reading an output port I guess it will
    become obsolete?

    Hans
    www.ht-lab.com
     
    HT-Lab, Dec 5, 2011
    #4
  5. Tricky

    eliascm

    Joined:
    Jan 30, 2009
    Messages:
    42
    Buffer Ports

    I stopped using buffer ports when I found that the Cypress Galaxy fitter (ancient and buggy, but I did a lot of designs using it) required std_logic and std_logic_vector ports for timing simulation. It takes an extra internal signal to avoid using buffer (this is before the new VHDL), but it was worth it to be able to do a timing simulation.
     
    eliascm, Dec 5, 2011
    #5
  6. Tricky

    Andy Guest

    On Dec 5, 5:33 am, HT-Lab <> wrote:
    >
    > With the VHDL2008 capability of reading an output port I guess it will
    > become obsolete?
    >
    > Hanswww.ht-lab.com


    Depends on whether reading an output in 2008 version returns the
    driven value or the resolved value of the output.

    Andy
     
    Andy, Dec 5, 2011
    #6
  7. Buffer ports worked fine last time I tried it.
    As I recall, it was sig'driving_value that used to fail silently in synthesis.
    I don't use buffer ports now because variables can drive both ports and nodes in process scope.

    -- Mike Treseler
     
    Mike Treseler, Dec 5, 2011
    #7
  8. Tricky

    JimLewis Guest

    On Dec 5, 8:29 am, Andy <> wrote:
    > Depends on whether reading an output in 2008 version returns the
    > driven value or the resolved value of the output.


    Driving value:
    Ports of mode out have identical semantics to ports of mode buffer.

    Jim
     
    JimLewis, Dec 13, 2011
    #8
  9. On 12/05/11 09:44, Tricky wrote:
    > Is there any reason more people dont use the buffer port type? is
    > there anything you cant do with it that you can do with an internal
    > signal?
    >
    > Is it just an old thing that old synthesisors wouldnt support it, and
    > it has fallen out of favour?


    Other than on top-level, we use type BUFFER for all our block output ports. We've not had any trouble with that for over 14 years now.

    Kind regards,

    Pieter Hulshoff
     
    Pieter Hulshoff, Dec 15, 2011
    #9
  10. Tricky wrote:

    > Is there any reason more people dont use the buffer port type? is
    > there anything you cant do with it that you can do with an internal
    > signal?


    The only reason people started using OUT in stead of BUFFER is because of
    its name. I would say if the names were reversed, everybody still would
    have used OUT with the bonus of not having to resort to ugly things a
    internal signals to be able to read back the value of such a port, let
    alone using INOUT for that reason.

    In our company BUFFER has always been the standard for outputs. Never had
    much trouble with that, except on top level, where foundries insisted on
    OUT. But that was easy to fix.

    Now with VHDL-2008, things have relaxed a bit more, so you can even mix
    BUFFER and OUT.

    --
    Paul Uiterlinden
    www.aimvalley.nl
    e-mail addres: remove the not.
     
    Paul Uiterlinden, Jan 2, 2012
    #10
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