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VHDL
Can anyone think of a workaround - Ideally I want to pass an accesstype into an entity (not for synt
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[QUOTE="KJ, post: 4201023"] Dump the data to a file. Use a string to pass the file name into the memory model. If the file name needs to be able to be changed during the simulation (i.e. if it must be a 'signal' rather than a 'generic') than the only limitation will be that the string name will need to be a fixed size. Even that limitation can be less onerous if you simply use a loooooong string size, null terminate the string and then have the memory model construct the file name by looking for the null termination. Even better, if you're using standard bitmap file formats like .BMP for the exchange than you can create read/write BMP file procedures which you will no doubt use somewhere down the road and not be tied to this particular memory model instance. Kevin Jennings [/QUOTE]
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Can anyone think of a workaround - Ideally I want to pass an accesstype into an entity (not for synt
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