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VHDL
Fixed Point Rounding
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[QUOTE="KJ, post: 4073794"] What you're missing is that whether X.5 rounds up or down depends on what X is. From ther user's guide... "round_style" defaults to fixed_round (true) that turns on the rounding routines. If false (fixed_truncate), the number is truncated. Rounding is done by first looking to see if the MSB of the remainder is a “1”, AND the LSB of the unrounded result is a “1” or the lower bits of the remainder include a “1”, the result will be rounded. This is similar to the floating-point “round_nearest” style. The down side is that ALL of the bits are included in the decision to round I use the "+0.5 and then truncating" approach because it takes less logic to implement (hence the 'down side' mentioned in the user's guide) and my requirements haven't so far required the floating-point “round_nearest” style Kevin Jennings [/QUOTE]
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