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VHDL
Hexadecimal value (literal) as function parameter, is it possible?
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[QUOTE="KJ, post: 5087645"] I'd suggest that you don't reinvent the wheel. Use the ieee.numeric_std library which already has resize functions for signed and unsigned types which can be converted, if necessary, to std_logic_vector if you must use that type. use ieee.numeric.std.all; .... toto <= std_logic_vector(resize(43690, 10)); -- One way to do it toto <= std_logic_vector(resize(16#AAAA#, 10)); -- Another way to do it Kevin Jennings [/QUOTE]
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Hexadecimal value (literal) as function parameter, is it possible?
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