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VHDL
Hexadecimal value (literal) as function parameter, is it possible?
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[QUOTE="Nicolas Matringe, post: 5087796"] Le 12/04/2013 14:46, [email]wimille@gmail.com[/email] a écrit : [...] Hello The problem comes from the line "resized := vec(size-1 downto 0);" that needs your input object vec to have a descending range. Litteral constants such as x"AAAA" have an ascending range so you can't pass them to your function. A solution would be to use an intermediate variable : function resize ( vec : in std_logic_vector; size : in natural) return std_logic_vector is constant LEN : natural := vec'length; variable i_vec : std_logic_vector(LEN-1 downto 0) := vec; variable resized : std_logic_vector( size-1 downto 0) := (others => '0'); and then use i_vec instead of vec in the function. Or you can use the resize functions that already exist in the numeric_std package as Kevin suggested. Nicolas [/QUOTE]
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Hexadecimal value (literal) as function parameter, is it possible?
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