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VHDL
issue with Chipscope
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[QUOTE="Andy Peters, post: 3895863"] I don't understand your comment, because Symon's suggestion is exactly what I was thinking as I read through this thread. I've never instantiated a chipscope core in any design. I've always used the Core Inserter, which is actually one of Xilinx' better tools. Its main benefits are: a) you don't have to decide in advance what signals you will always analyze. You do it after your coding is done. b) It's not in your HDL at all, which helps if you'd like to simulate or whatever. c) When you're satisfied that the design is functioning, you simply delete the core from your project and rebuild. -a [/QUOTE]
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