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VHDL
replacing whens with some kind of for-loop,
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[QUOTE="eliascm, post: 4029914, member: 54727"] [b]Replacing "whens"[/b] The code below does essentially what you are trying to do. The function num_bits is in a package I wrote (vhdl_lib_2.arithmetic_pkg). --===================================================================== library ieee; use ieee.std_logic_1164.all; --===================================================================== package m_to_n_mux_pkg is constant mux_in_width : positive := 256; -- m constant mux_out_width : positive := 9; -- n type vec_array is array(mux_in_width - 1 downto 0) of std_logic_vector(mux_out_width - 1 downto 0); component m_to_n_mux port( sel : in std_logic_vector; mux_in : in vec_array; mux_out : out std_logic_vector(mux_out_width - 1 downto 0) ); end component; end m_to_n_mux_pkg; --===================================================================== library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; library vhdl_lib_2; use vhdl_lib_2.arithmetic_pkg.all; use work.m_to_n_mux_pkg.all; --===================================================================== --The num_bits function returns the minimum number of bits required to represent a specified number -- of states using binary encoding. For example: num_bits(5) = 3, num_bits(8) = 3, num_bits(9) = 4 ----------------------------------------------------------------------- entity m_to_n_mux is port( sel : in std_logic_vector(num_bits(mux_in_width) - 1 downt to 0); mux_in : in vec_array; mux_out : out std_logic_vector(mux_out_width - 1 downto 0) ); end m_to_n_mux; architecture arch_mux of m_to_n_mux is begin pmux : process(mux_in, sel) begin mux_out <= mux_in(to_integer(unsigned(sel))); end process; end arch_mux; [/QUOTE]
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replacing whens with some kind of for-loop,
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