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VHDL
type casting / conversion again
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[QUOTE="backhus, post: 4145920"] Hi Shannon, besides numeric_std there's another library available (since VHDL-2008): numeric_std_unsigned You may try to use this with your tools. In case it won't work, maybe it's predecessor works for you: numeric_unsigned Search the net for the sources and you can work with std_logic(_vector) just like they were unsigned. Goody ol' std_logic_unsigned did a similar thing, and because we liked it so much numeric_std_unsigned is now part of the standard. Have a nice synthesis Eilert [/QUOTE]
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