4 bit adder with overflow check

[hexler]

Hi there,

I found this forum with google search, because I don't know any forum with VHDL topics.

I have successfully compiled a 4 bit adder with the port map method.
Now I want to check for an overflow and I've created a process that checks the last carry out.

But now I'am getting an error that my output bitvector has more than one sources. (Because VHDL is working parallel)

How can I fix this?

Here is my architecture: http://pastebin.sk/en/1320/

Thanks

 

[martin.wahlstedt]

The error is correct, if t4='1', you are driving the output from two sources. One thing you can do is to use an internal signal (out_temp) from the two-adders and extend the process to

process(t4) begin
if (t4 = '1') then
output <= "1111";
else output <= "out_temp";
end if;
end process;

/Martin