AVM, VMM, UMM, Teal/Truss, ....

[Amal]

We are in the process or evaluating new verification methodologies.

Calling all experienced SystemVerilog verification people to comment
on their experience and if possible, provide a list of features they
like and they do not like in each methodology.

Having a list comparing each feature in each methodology would be
great as well.
-- Amal

 

[mmintz]

Hi Amal,

As I co-developed Teal/Truss, I will be a bit biased ;-) While I have
used VMM and AVM, I will only comment on Teal/Truss.

Teal/Truss run on MTI and Synopsys simulators, with Cadence and Aldec
coming soon. Truss/teal are free and open-source, available on www.trusster.com
There is also a forum for teal/truss users there. Also, there is
documentation on the download page.

Teal is a set of utilities for verification. It includes a register/
memory mapping feature, a file/code based parameter passing feature, a
logging feature, and a random number feature.

Truss is a light-weight methodology and mainly concentrates on the
upper levels of control, which we call the "dance". It's tiny, with 10
header files and two source files. There is also three example
testbences, each with about 30 files.

For more information about VMM, see www.vmmuser.org . For more info on
AVM, see http://groups.google.com/group/avm-users?hl=en

Feel free to contact me mike <> trusster if you have more questions.

Hope that helps,
Mike