clocking an enable input

Discussion in 'VHDL' started by jazzman519, Jan 13, 2010.

  1. jazzman519

    jazzman519

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    well guys,
    just wondering if anyone has information on having an enable input clocked to go high every 100ms. ther is 2 inputs to an and gate, enable and a square wave and i want to output the square wave only three times( once every 100ms, for 300ms). any help would be appreciated

    later

    thanks
     
    jazzman519, Jan 13, 2010
    #1
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