conversion function

Discussion in 'VHDL' started by ALuPin@web.de, Jan 16, 2008.

  1. Guest

    Hi newsgroup,

    I have the following piece of code:

    use ieee.std_logic_1164.all;
    use ieee.std_logic_arith.all;
    use ieee.std_logic_unsigned.all;
    ....
    subtype file_element IS std_logic_vector(7 downto 0);
    type header_array IS array(53 downto 0) of file_element;
    signal header : header_array;

    process(..)
    variable next_vector : bit_vector (0 DOWNTO 0);
    variable index : integer := 0;
    begin
    header(index) <= conv_std_logic_vector(bit'pos(next_vector(0)), 8);

    end process;


    How do I have to code "header(index) <= ..." when using the library
    "ieee.numeric_std.all" ?

    Thank you for your opinion.

    Rgds
     
    , Jan 16, 2008
    #1
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  2. a écrit :
    > Hi newsgroup,
    >
    > I have the following piece of code:
    >
    > use ieee.std_logic_1164.all;
    > use ieee.std_logic_arith.all;
    > use ieee.std_logic_unsigned.all;
    > ...
    > subtype file_element IS std_logic_vector(7 downto 0);
    > type header_array IS array(53 downto 0) of file_element;
    > signal header : header_array;

    [...]
    > begin
    > header(index) <= conv_std_logic_vector(bit'pos(next_vector(0)), 8);
    >
    > end process;
    >
    > How do I have to code "header(index) <= ..." when using the library
    > "ieee.numeric_std.all" ?


    Hello

    Define file_element as unsigned instead of std_logic_vector, then use
    to_unsigned instead of conv_std_logic_vector

    Nicolas
     
    Nicolas Matringe, Jan 16, 2008
    #2
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