Creating a new type for STD_LOGIC_VECTOR

[Kwaj]

I would like to create a new type, bit32word, which would be a 16bit
std_logic_vector. I tried the following,

type bit32word is STD_LOGIC_VECTOR(31 DOWNTO 0);

which didn't seem to work. Any ideas??

- Kwaj

 

[Steffen Netz]

Hello Kwaj,

that the typical case for an subtype:
SUBTYPE bit32word IS std_logic_vector(31 DOWNTO 0);
SIGNAL rega : bit32word := (OTHERS=>'0');

You can even get an array of this by the array type:
TYPE romarray IS ARRAY (integer RANGE <>) OF bit32word;
SIGNAL rom_mem : romarray(255 downto 0);

regards,

Steffen

I would like to create a new type, bit32word, which would be a 16bit
std_logic_vector. I tried the following,

type bit32word is STD_LOGIC_VECTOR(31 DOWNTO 0);

which didn't seem to work. Any ideas??

- Kwaj

--
-----------------------------------------------------------------------------
| Fraunhofer Institut Photonische Microsysteme |
| |
| Fraunhofer Institute for Photonic Microsystems ( Germany ) |
| |
| Steffen Netz | phone : ( +49 ) (0)351/8823-212 |
| Grenzstrasse 28 | fax : ( +49 ) (0)351/8823-266 |
| 01109 Dresden | email : (e-mail address removed) |
-----------------------------------------------------------------------------

 

[Riyaz]

Try using subtype instead of type

 

[Lee]

Hi,

This is array type that has different syntax with scalar type.

type bit32word is array (31 DOWNTO 0) of STD_LOGIC_VECTOR;

Try it to see if it works.

Regards,