DAC implementation via VHDL within a CPLD

Discussion in 'VHDL' started by AlfonsoGarcia, Jun 14, 2004.

  1. Hi all,
    I am curious about how a implemenation of a digital to Analog converter
    could work within a CPLD. From the knowledge I gained in the last few
    weeks, a CPLD can be only used for digital communications. The internal
    signals are either HIGH or LOW. I saw the following vhdl code:

    process (d2a_reg)
    variable d2a_int : integer;
    variable d2a_real : real;
    begin
    d2a_int := CONV_INTEGER(d2a_reg);
    d2a_real := (real (d2a_int)) / scale;
    -- overflow
    if (d2a_real > (real (overflow)) ) then
    d2a_out <= real (overflow);
    else
    d2a_out <= d2a_real;
    end if;
    end process; -- d2a conversion block

    But all what it does is, to convert the digital values to a real value.
    How can I create an analog voltage dependend signal out of it. I guess I
    would need external circuitry around my CPLD for my application.
    Any help or explanation about this issue will be very much appreciated.

    Alfons
    AlfonsoGarcia, Jun 14, 2004
    #1
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  2. AlfonsoGarcia

    Wallclimber Guest

    Hi Alfonso,

    the VHDL code below was most likely part of a testbench or part of a
    behavioral model of a chip that contains a DA convertor. Maybe it's a
    CPLD that also contains a DA convertor?

    Tom


    "AlfonsoGarcia" <> wrote in message news:<>...
    > Hi all,
    > I am curious about how a implemenation of a digital to Analog converter
    > could work within a CPLD. From the knowledge I gained in the last few
    > weeks, a CPLD can be only used for digital communications. The internal
    > signals are either HIGH or LOW. I saw the following vhdl code:
    >
    > process (d2a_reg)
    > variable d2a_int : integer;
    > variable d2a_real : real;
    > begin
    > d2a_int := CONV_INTEGER(d2a_reg);
    > d2a_real := (real (d2a_int)) / scale;
    > -- overflow
    > if (d2a_real > (real (overflow)) ) then
    > d2a_out <= real (overflow);
    > else
    > d2a_out <= d2a_real;
    > end if;
    > end process; -- d2a conversion block
    >
    > But all what it does is, to convert the digital values to a real value.
    > How can I create an analog voltage dependend signal out of it. I guess I
    > would need external circuitry around my CPLD for my application.
    > Any help or explanation about this issue will be very much appreciated.
    >
    > Alfons
    Wallclimber, Jun 14, 2004
    #2
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  3. AlfonsoGarcia a écrit:
    [...]
    > But all what it does is, to convert the digital values to a real value.
    > How can I create an analog voltage dependend signal out of it. I guess I
    > would need external circuitry around my CPLD for my application.
    > Any help or explanation about this issue will be very much appreciated.


    Hi
    Forget about this code, type 'real' is NOT synthesizable.
    You can make a very simple DAC with a few resistors and an op amp as
    shown here for example: http://www.allaboutcircuits.com/vol_4/chpt_13/3.html

    --
    ____ _ __ ___
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    | | | | | (_| |_| | Invalid return address: remove the -
    |_| |_|_|\__|\___/
    Nicolas Matringe, Jun 15, 2004
    #3
  4. That's what I mean. I need external circuitry in order to make the DA
    converter reality. Only through a CPLD or FPGA it is not possible.
    Thanks for the hints and help.
    Alfonso
    AlfonsoGarcia, Jun 15, 2004
    #4
  5. "AlfonsoGarcia" <> wrote:
    > How can I create an analog voltage dependend signal out of it. I guess I
    > would need external circuitry around my CPLD for my application.
    > Any help or explanation about this issue will be very much appreciated.


    Your right, you can't create an useful analog voltage only using
    digital outputs. You need at least some resistors outside the
    fpga/cpld.
    A typical DAC using an fpga consists either of paralell outputs and a
    resistor network, or does some PWM filtering with a lowpass.
    Of course you could also use a ready DAC-IC and controll it by the
    fpga.

    bye Thomas
    Thomas Stanka, Jun 15, 2004
    #5
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