how to convert real to std_logic

Discussion in 'VHDL' started by sajjadesrari, Oct 26, 2009.

  1. sajjadesrari

    sajjadesrari

    Joined:
    Oct 14, 2009
    Messages:
    2
    hello
    i'm new in vhdl
    i want to convert real to std_logic
    (in fact i want to put the real value to the output so first i should convert
    it to std_logic right?)
    how can i do it?
    thanks.
     
    sajjadesrari, Oct 26, 2009
    #1
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  2. sajjadesrari

    jeppe

    Joined:
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    Denmark
    Try this:

    vector_with_8bit <= conv_std_logic_vector( integer( r), 8 );
     
    jeppe, Oct 26, 2009
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  3. sajjadesrari

    sajjadesrari

    Joined:
    Oct 14, 2009
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    thanks but i couldnt check it because
    i have problem in converting std_logic to real!!!!
    i did this:
    real variable := to_real(to_integer(signed(std_logic value)));

    but with this error:
    Error (10305): VHDL Type Conversion error at xorgate.vhd(54): cannot convert type "std_logic" to type "SIGNED"

    what's this????
    thanks...
     
    sajjadesrari, Oct 31, 2009
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