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- Mar 29, 2007
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Hey,
Have someone managed to infer a BRAM of maximum width (9, 18, 36 etc) and get the expected resource utilization? When infering a 36x512 buffer, xst uses BRAMS but for 32x512, only one is used. Does this have anything to do with the parity bits? How do I specify that I want to use them for buffering as well?
Coregen gives what I'm expecting but I would like to infer the buffer of a number of reasons (to keep the design consistent, to speed up simulations...).
Someone have a solution for this?
Thanks,
Martin
Have someone managed to infer a BRAM of maximum width (9, 18, 36 etc) and get the expected resource utilization? When infering a 36x512 buffer, xst uses BRAMS but for 32x512, only one is used. Does this have anything to do with the parity bits? How do I specify that I want to use them for buffering as well?
Coregen gives what I'm expecting but I would like to infer the buffer of a number of reasons (to keep the design consistent, to speed up simulations...).
Someone have a solution for this?
Thanks,
Martin