RTL simulation in modelsim. I have one block that outputs an ack signal and data that changes on a clock edge. Another block has this ack and data as an input (registered inputs). Now when the ack and data change (simultaneously) the ack is checked by the receiving block and if its changed the data is grabbed and output by the second block (hope this makes sense).
Now in the real world on clk edge 1 ack and data change at output from first block.
On clock edge two second block sees these changes and grabs data as a result of this input.
The problem I have is that in the RTL land modelsim is changing the ack and data from block one and on the same edge seeing these conditions on the second block and doing the state change. However in this state one output is changing as it is supposed to but the data that its grabbing from block 1 is the previous value and not the new value that occurred on this edge.
Hwo do you get around this to make modelsim representative in that it changes everything in zero time on one edge?
Now in the real world on clk edge 1 ack and data change at output from first block.
On clock edge two second block sees these changes and grabs data as a result of this input.
The problem I have is that in the RTL land modelsim is changing the ack and data from block one and on the same edge seeing these conditions on the second block and doing the state change. However in this state one output is changing as it is supposed to but the data that its grabbing from block 1 is the previous value and not the new value that occurred on this edge.
Hwo do you get around this to make modelsim representative in that it changes everything in zero time on one edge?