Question about GNU make

P

Peter Mueller

Hello,

I want to use GNU make to build my program.

I use a tool that generates c files. I'm looking for a solution that
when calling make

1) the tool is called generating the C files
2) the c-files are compiled
3) the exe is generated.

I did not want to list the filenames of the generated files in the OBJ
variable. Make should find out them automatically.

How can this be done with GNU make?

Thanks,
Peter
 
F

Fred

Hello,

I want to use GNU make to build my program.

I use a tool that generates c files. I'm looking for a solution that
when calling make

1) the tool is called generating the C files
2) the c-files are compiled
3) the exe is generated.

I did not want to list the filenames of the generated files in the OBJ
variable. Make should find out them automatically.

How can this be done with GNU make?

Best ask in a gnu group, or unix, or whatever platform you are using.
Or a newsgroup that is about the tool you are using.

How do you think Make can magically determine what files you want to
compile?
Your tool should create the makefile.
 
A

Antoninus Twink

I use a tool that generates c files. I'm looking for a solution that
when calling make

1) the tool is called generating the C files
2) the c-files are compiled
3) the exe is generated.

I did not want to list the filenames of the generated files in the OBJ
variable. Make should find out them automatically.

How can this be done with GNU make?

As others have suggested, getting the tool to create the Makefile would
be a neat solution.

Another simple solution would be to use wildcards to catch all the files
produced by the tool.

For example, consider a tool called makefoo.sh, which produces some
files foo_dep0.c, foo_dep1.c, .... These need to be compiled and linked
together with foo.c to produce a final executable foo. Then you could
use something like this (.generated is an auxiliary file used to detect
when the foo_dep* files need to be regenerated):


all : .generated foo

OBJECTS=foo.o $(patsubst %.c,%.o,$(wildcard foo_dep*.c))

foo : $(OBJECTS)

..generated : makefoo.sh
./makefoo.sh
touch .generated
make foo

clean :
rm -f $(OBJECTS) foo_dep*.c .generated
 
P

Peter Mueller

Hi Antoninus,

As others have suggested, getting the tool to create the Makefile would
be a neat solution.

Another simple solution would be to use wildcards to catch all the files
produced by the tool.

For example, consider a tool called makefoo.sh, which produces some
files foo_dep0.c, foo_dep1.c, .... These need to be compiled and linked
together with foo.c to produce a final executable foo. Then you could
use something like this (.generated is an auxiliary file used to detect
when the foo_dep* files need to be regenerated):

all : .generated foo

OBJECTS=foo.o $(patsubst %.c,%.o,$(wildcard foo_dep*.c))

foo : $(OBJECTS)

.generated : makefoo.sh
        ./makefoo.sh
        touch .generated
        make foo

clean :
        rm -f $(OBJECTS) foo_dep*.c .generated

this is exactly what I've looked for.

Thanks for the example!

Regards,
Peter
 

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