Separate elaboration and parsing

Discussion in 'VHDL' started by valtih1978, Apr 24, 2014.

  1. valtih1978

    valtih1978 Guest

    It seems that VHDL tools separate parsing from elaboration. However, it
    seems that some constructions are ambigous at syntax level. For
    instnance, http://cs.stackexchange.com/questions/24032, target <=
    prefix(argument) can be treated as either

    element <= composite_name(10) // selecting an element

    or

    int_target <= integer(1.1) // conversion

    How do the tools handle this case? How do they communicate to the
    elaborator whether elements should be addressed or conversion function
    instantiated?
     
    valtih1978, Apr 24, 2014
    #1
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  2. valtih1978

    KJ Guest

    On Thursday, April 24, 2014 8:48:39 AM UTC-4, valtih1978 wrote:
    > It seems that VHDL tools separate parsing from elaboration. However, it
    >
    > seems that some constructions are ambigous at syntax level. For
    >
    > instnance, http://cs.stackexchange.com/questions/24032, target <=
    >
    > prefix(argument) can be treated as either
    >
    >
    >
    > element <= composite_name(10) // selecting an element
    >
    >
    >
    > or
    >
    >
    >
    > int_target <= integer(1.1) // conversion
    >
    >
    >
    > How do the tools handle this case? How do they communicate to the
    >
    > elaborator whether elements should be addressed or conversion function
    >
    > instantiated?


    They don't communicate. When the names 'composite_name' and 'integer' comeacross, that name must have already been defined. If they are not defined, you get an error saying that 'composite_name' is unrecognized. If they are defined but you are using them incorrectly (for example by passing in aninteger argument to something that is expecting a real) then you will get an error pointing out what you're doing wrong.

    Kevin Jennings
     
    KJ, Apr 24, 2014
    #2
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  3. valtih1978

    valtih1978 Guest

    On 24.04.2014 20:21, KJ wrote:
    > They don't communicate. When the names 'composite_name' and
    > 'integer' come across, that name must have already been defined. If
    > they are not defined, you get an error saying that 'composite_name'
    > is unrecognized. If they are defined but you are using them
    > incorrectly (for example by passing in an integer argument to
    > something that is expecting a real) then you will get an error
    > pointing out what you're doing wrong.


    You basically say that parser does the elaboration (if "The process by
    which a declaration achieves its effect is called the elaboration of the
    declaration" is not elaboration then what is elaboration?) for the
    purpose of mantaining the list of defined objects and, thereby, is not
    related with elaboration. Try once more. That statement as it is is pure
    nonsense.
     
    valtih1978, Apr 25, 2014
    #3
  4. valtih1978

    valtih1978 Guest

    Why Fortran? Do you know that meaning of the symbol depends on the
    scope? So, how many tables do you need in VHDL? Do you mean that there
    is a difference between elaborating the definitions and building all
    those tables?
     
    valtih1978, Apr 25, 2014
    #4
  5. valtih1978

    valtih1978 Guest

    Particularly, parser works at per-file basis. Yet, file may refer
    objects defined in another file (package), which parser have no idea of.
    Only elaborator is aware of their nature. How do you build your symbol
    table without elaborating the design?
     
    valtih1978, Apr 25, 2014
    #5
  6. valtih1978

    KJ Guest

    On Friday, April 25, 2014 8:43:58 AM UTC-4, valtih1978 wrote:
    > Particularly, parser works at per-file basis. Yet, file may refer
    >
    > objects defined in another file (package), which parser have no idea of.
    >


    "which parser have no idea of"...That is not correct

    > Only elaborator is aware of their nature. How do you build your symbol
    >
    > table without elaborating the design?


    - In one word 'library'.
    - In two questions to guide the reader to the solution 'Where do you think the output of parsing the file ends up?' and 'What do you think then happens with that output?' Hint: The 'one word' will help you on both questions.

    I would be more helpful, but your misstating what I did say and then your statement to me "That statement as it is is (sic) pure nonsense" when in fact it is correct leads me to make you do some work for yourself.

    Kevin Jennings
     
    KJ, Apr 25, 2014
    #6
  7. valtih1978

    valtih1978 Guest


    > Because parsing the language and actually running a sim (or building
    > a final bit stream to program a device) are separate task.


    Thanks for even more nonsense.

    > The LRM has some rules. The "object code" or


    LRM says that there is analyzis stage and elaboration, which check the
    design semantics and bind the objects. Thanks for attributing all that
    activity to the parser and ignoring any analysis/elaboration that
    perform on top of it. Since I asked about the difference between parser
    and elaboration, it makes a great sense to silence any
    analysis/elaboration and lead astray to the higher level tasks. This
    should be really convincing.
     
    valtih1978, Apr 26, 2014
    #7
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