Colin Beighley said:
Hello,
Is there a standard way in which the value 'X' assigned to a signal
gets synthesized?
'X' tends not to be assigned to signals directly - it's the result of
driving a '0' and a '1' at the same time. You *can* assign it yourself,
and synthesis tools *may* treat it as a don't care.
(If you want a don't care, '-' is the VHDL value which you can assign to
a signal/variable. Synthesis tools (IME) will treat it properly and use
that knowledge to optimise logic. Be aware that the normal '=' operator
doesn't work that way though - you have to use std_match)
I would assume that it would just trigger a synchronous LUT reset.
That's an interesting assumption on a few counts:
1) The LUTs are not synchronous
2) *Assuming* you meant a flipflop, the synchronous (or not) nature of a
write to a signal depends on the context in which it's written, not the
value that's written.
3) *Assuming* 'X' were to be representable and assigned in a clocked
process, would the flipflop not just take the value 'X' (as in
simulation) and propagate it to the output?
Cheers,
Martin