variable cnt1 : std_logic_vector(20 downto 0):= (cnt1'right => '1', others => '0');

Discussion in 'VHDL' started by hassenman, Mar 12, 2009.

  1. hassenman

    hassenman

    Joined:
    Mar 12, 2009
    Messages:
    3
    Hi,

    I want to initialise a variable this way :
    Code:
    variable cnt1 : std_logic_vector(20 downto 0):= (cnt1'right => '1', others => '0');
    I know i doesn't work, i want to know the correct way of doing this kind of initialisations.

    Best regards,
    Hassen.
     
    hassenman, Mar 12, 2009
    #1
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  2. hassenman

    jeppe

    Joined:
    Mar 10, 2008
    Messages:
    348
    Location:
    Denmark
    Try this

    variable cnt1 : std_logic_vector(20 downto 0):= ((0)=>'1',others=>'0');

    Your welcome
    Jeppe
     
    jeppe, Mar 13, 2009
    #2
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  3. hassenman

    hassenman

    Joined:
    Mar 12, 2009
    Messages:
    3
    Hi,
    Thank you, it worked !

    Now i want to do the following :
    Code:
    if count = ((20 downto 11) => (others => '0'), (10 downto 0) => (others => '1')) then
    	   led <= '1';
    	  end if;
    or :
    Code:
    if count = ((20 downto 11) => (others => '0'), others => '1') then
    	   led <= '1';
    	  end if;
    Best regardes,
    Hassen.
     
    Last edited: Mar 13, 2009
    hassenman, Mar 13, 2009
    #3
  4. hassenman

    jeppe

    Joined:
    Mar 10, 2008
    Messages:
    348
    Location:
    Denmark
    The best way will be this:

    if count="000000000011111111111" then
    led<='1';
    end if;

    Your welcome
    Jeppe
     
    jeppe, Mar 14, 2009
    #4
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