Verification, terminologie issu

Discussion in 'VHDL' started by thomas.b36@gmail.com, Mar 7, 2006.

  1. Guest

    Hi all,

    What's that mean : "Low Level Verification of ASIC Soc"?. The SoC
    should be tested on development board containing FPGA, CPU and so. In
    this cas how would you proceed using C programming?. Do one need to be
    proficient in C prog or just fonctional C will do?.

    Thank for your precious time Gentlemans and Ladies.

    Thomas.
    , Mar 7, 2006
    #1
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