How to close a file in ModelSim

[Dave Higton]

I've been simulating some VHDL in ModelSim XE today, using textio to
read a stimulus file. The simulation runs OK, but, when it stops, it
seems that the file is still open; because I wanted to create a new
stimulus file, and my attempts were met with "file sharing violation"
errors.

How do I close the file: (1) when the simulation has read all the data
that are in the file, and (2) from the ModelSim command line or gui,
when I've stopped the simulation before it's read everything?

Tia.

Dave

 

[Egbert Molenkamp]

http://www.eda.org/comp.lang.vhdl/FAQ1.html#files
answers probably your question

Egbert Molenkamp

 

[Dave Higton]

In message <[email protected]>

http://www.eda.org/comp.lang.vhdl/FAQ1.html#files
answers probably your question

It answers (1), anyway, and thankyou for that.

Any answer for (2)?

Dave

 

[Mike Treseler]

Any answer for (2)?

Once you tell modelsim to run,
your vhdl testbench is in control
until all processes wait.

Any special logic for file control
would have to be in your testbench.
You could add a generic constant
for the number of test steps, for example.

Better yet, consider using a vhdl
constant array instead of a
separate text file.

-- Mike Treseler

-- Mike Treseler

 

[Dave Higton]

In message <[email protected]>

Once you tell modelsim to run,
your vhdl testbench is in control
until all processes wait.

Any special logic for file control
would have to be in your testbench.
You could add a generic constant
for the number of test steps, for example.

Better yet, consider using a vhdl
constant array instead of a
separate text file.

Thankyou for your answer.

Hmm, not a very good advert for the language, is it? I understand that
the test bench is in control /while it's running/, but the problem I'm
having is when the simulation /has stopped/ - either because I told MS
to run for a fixed time, and it hasn't consumed all the data yet, or
because I've realised that something is wrong and hit Break. I need to
create new simulation data, but I can't because the file is still open,
even though the test bench isn't running. As far as I can see, MS gives
me no way to close the file other than running the simulation some more
until all data have been consumed (but so has a lot of my time, waiting
for it) or to quit MS and re-start it, or close the project or dataset
and re-open it. Curious. There is a "close channelId" command, but I
can find no way to give it a channelId appropriate to the open file.

The idea of reading the data into an array at start of sim, and closing
the file when all data have been read (very soon after start of sim)
is an interesting one, though, so thankyou for that.

Dave

 

[Mike Treseler]

Thankyou for your answer.
Hmm, not a very good advert for the language, is it?

It was not intended to be.
VHDL and vsim are what they are.
Consider tracing code to debug
rather than run and break.

The idea of reading the data into an array at start of sim, and closing
the file when all data have been read (very soon after start of sim)
is an interesting one, though, so thankyou for that.

You are welcome, but the idea was
to use a vhdl *constant* array
*instead* of a file.

-- Mike Treseler

 

[Ajeetha Kumari]

Hi Dave,
I think the issue here is that VHDL file handles can't be controlled
by TCL.

and re-open it. Curious. There is a "close channelId" command, but I
can find no way to give it a channelId appropriate to the open file.

That's meant for TCL file handles.

One possible solution to your problem could be the following. I didn't
test this idea, so please take it with a pinch of salt. I would be
thankful if you can let us know if this works for you.

-- idea is to have a signal and trigger it from TCL

signal close_file_trigger : std_logic := '0';

process (close_file_trigger)
begin
report "Closing file..";
file_close(..)
end process

Of-course the above is skeleton code.

Now from TCL do a deposit/force a 1 to this signal and run for say 1
ns or so.

Regards,
Aji,
http://www.noveldv.com

 

[Dave Higton]

In message <[email protected]>

You are welcome, but the idea was
to use a vhdl *constant* array
*instead* of a file.

I appreciate the difference; your suggestion sparked off another idea.
I need to try it, but it looks promising. It would appear that I could
read /all/ the simulation data in and close the file, within a very
short time at the start of simulation, so there's little danger of the
textio file's being left open. I can modify the simulation data all I
want without needing to splice the data into the VHDL and without
needing to re-compile the VHDL whenever I change the simulation data.

I may, of course, have misunderstood the degree of difficulty (either
over or under) of either approach. This isn't an area I'm very familiar
with.

Dave

 

[Dave Higton]

In message <[email protected]>

Hi Dave,
I think the issue here is that VHDL file handles can't be controlled
by TCL.



That's meant for TCL file handles.

Ah, that figures.

One possible solution to your problem could be the following. I didn't
test this idea, so please take it with a pinch of salt. I would be
thankful if you can let us know if this works for you.

-- idea is to have a signal and trigger it from TCL

signal close_file_trigger : std_logic := '0';

process (close_file_trigger)
begin
report "Closing file..";
file_close(..)
end process

Of-course the above is skeleton code.

Now from TCL do a deposit/force a 1 to this signal and run for say 1
ns or so.

Neat idea. I'll give it a whirl. Thanks.

Dave

 

[Martin Bishop]

A neat work arround.

However, it prompts me to question whether VHDL requires (for testbenches)
the exit and exeption handler constructs found in C++, Delphi (Object
Pascal) and even (using string and gum) Visual Basic.

An obvious approach is to extend the BLOCK syntax:
BLOCK
OpenFile;
...
FINALLY -- exit handler
CloseFile;
END BLOCK;

Perhaps these should be (are) proposed for VHDL-200x.

I presume systemC has these constructs.

Martin